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1.发明授权公开(公告)号：US11411175B2
公开(公告)日：2022-08-09
申请号：US16866989
申请日：2020-05-05
发明人： Anthony J. Annunziata , Chandrasekara Kothandaraman , Nathan P. Marchack , Eugene J. O'Sullivan
摘要： A semiconductor device and a method for fabricating the same. The semiconductor device includes a substrate and at least one trench line formed within the substrate. The semiconductor device further includes a self-aligned landing pad in contact with the at least one trench line, and a magnetic tunnel junction stack formed on and in contact with the self-aligned landing pad. The method includes forming a conductive layer on and in contact with at least one trench line formed within a substrate. Magnetic tunnel junction stack layers are deposited on and in contact with the conductive layer. The magnetic tunnel junction stack layers are etched to form a magnetic tunnel junction stack, where the etching stops on the conductive layer.
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公开(公告)号：US20220143605A1
公开(公告)日：2022-05-12
申请号：US17095538
申请日：2020-11-11
IPC分类号： B01L3/00
摘要： A method of forming a microfluidic device is disclosed. The method includes forming a first dielectric layer on a substrate, forming electrodes partially into the first dielectric layer, and forming a second dielectric layer on the electrodes. The method includes filling, with a metal material, two wells formed in the second dielectric layer such that the metal material is in direct contact with the electrodes. The method includes forming a third dielectric layer on the metal material and second dielectric layer. The method includes filling, with a structural material, a channel formed between the wells such that the structural material does not directly contact the electrodes. The method includes forming a fourth dielectric layer on the third dielectric layer and the structural material, extracting the structural material through at least one vent hole in the fourth dielectric layer, and forming a fifth dielectric layer on the fourth dielectric layer.
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公开(公告)号：US10971576B2
公开(公告)日：2021-04-06
申请号：US15817858
申请日：2017-11-20
发明人： Hariklia Deligianni , William J. Gallagher , Andrew J. Kellock , Eugene J. O'Sullivan , Lubomyr T. Romankiw , Naigang Wang
IPC分类号： C23C18/16 , C23C18/18 , C23C18/50 , H01L49/02 , H01L21/288 , H01F5/00 , H01F27/00 , H01F41/04 , H01L23/522 , H01F41/26 , H01F1/04 , H01F27/24 , H01F27/28
摘要： An on-chip magnetic structure includes a magnetic material comprising cobalt in a range from about 80 to about 90 atomic % (at. %) based on the total number of atoms of the magnetic material, tungsten in a range from about 4 to about 9 at. % based on the total number of atoms of the magnetic material, phosphorous in a range from about 7 to about 15 at. % based on the total number of atoms of the magnetic material, and palladium substantially dispersed throughout the magnetic material.
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4.发明授权公开(公告)号：US10943732B2
公开(公告)日：2021-03-09
申请号：US16291795
申请日：2019-03-04
摘要： A magnetic material stack comprises a first dielectric layer, a first magnetic material layer on the first dielectric layer, at least a second dielectric layer on the first magnetic material layer and at least a second magnetic material layer on the second dielectric layer. One or more surfaces of the layers are smoothed to remove at least a portion of surface roughness on the respective layers.
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公开(公告)号：US20210043827A1
公开(公告)日：2021-02-11
申请号：US16534609
申请日：2019-08-07
摘要： A memory structure is provided that avoids high resistance due to the galvanic effect. The high resistance is reduced and/or eliminated by providing a T-shaped bottom electrode structure of uniform construction (i.e., a single piece). The T-shaped bottom electrode structure includes a narrow base portion and a wider shelf portion. The shelf portion of the T-shaped bottom electrode structure has a planar topmost surface in which a MTJ pillar forms an interface with.
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公开(公告)号：US10784045B2
公开(公告)日：2020-09-22
申请号：US14854523
申请日：2015-09-15
发明人： Hariklia Deligianni , William J. Gallagher , Sathana Kitayaporn , Eugene J. O'Sullivan , Lubomyr T. Romankiw , Naigang Wang , Joonah Yoon
摘要： A technique relates to a method of forming a laminated multilayer magnetic structure. An adhesion layer is deposited on a substrate. A magnetic seed layer is deposited on top of the adhesion layer. Magnetic layers and non-magnetic spacer layers are alternatingly deposited such that an even number of the magnetic layers is deposited while an odd number of the non-magnetic spacer layers is deposited. The odd number is one less than the even number. Every two of the magnetic layers is separated by one of the non-magnetic spacer layers. The first of the magnetic layers is deposited on the magnetic seed layer, and the magnetic layers each have a thickness less than 500 nanometers.
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公开(公告)号：US10741327B2
公开(公告)日：2020-08-11
申请号：US15418815
申请日：2017-01-30
摘要： An inductor device includes a conductive coil formed within a dielectric material and having a central core area within the coil. Particles are dispersed within the central core region to reduce eddy current loss and increase energy storage. The particles include magnetic properties.
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8.发明申请公开(公告)号：US20190189914A1
公开(公告)日：2019-06-20
申请号：US15841872
申请日：2017-12-14
摘要： A method of forming a semiconductor structure includes forming a first spacer material over two or more mandrels disposed over a magnetoresistive random-access memory (MRAM) stack. The method also includes performing a first sidewall image transfer of the two or more mandrels to form a first set of fins of the first spacer material over the MRAM stack, and performing a second sidewall image transfer to form a plurality of pillars of the first spacer material over the MRAM stack. The pillars of the first spacer material form top electrodes for a plurality of MRAM cells patterned from the MRAM stack.
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公开(公告)号：US20180308898A1
公开(公告)日：2018-10-25
申请号：US16021214
申请日：2018-06-28
CPC分类号： H01L43/12 , H01L27/228 , H01L43/08 , H01L45/06
摘要： A method of forming a semiconductor structure includes forming two or more pillar structures over a top surface of a substrate. The method also includes forming two or more contacts to the two or more pillar structures. The method further includes forming an insulator between the two or more pillar structures and the two or more contacts. The two or more contacts are self-aligned to the two or more pillar structures by forming the insulator via conformal deposition and etching the insulator selective to a spin-on material formed over the insulator between the two or more pillar structures.
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公开(公告)号：US20180286666A1
公开(公告)日：2018-10-04
申请号：US15477416
申请日：2017-04-03
IPC分类号： H01L21/02 , H01L21/033 , B08B7/00 , B08B3/08
摘要： A first material is filled during a semiconductor fabrication process in a space bound on at least one side by a fence formation created as a result of an etching operation. A solvent-removable material is deposited such that the solvent-removable material encapsulates at least that portion of the fence formation which is protruding from the structure such that a height of the fence formation exceeds a height of the structure. The portion of the fence formation which is protruding from the structure and a first portion of the solvent-removable material are removed by planarization. A second portion of the solvent-removable material is removed by dissolving in a solvent, the second portion remaining after removal by the planarization of the first portion of the solvent-removable material.
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