公开(公告)号：US20190074070A1

公开(公告)日：2019-03-07

申请号：US16182355

申请日：2018-11-06

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Feng Pan ,  Ramin Ghodsi ,  Qiang Tang

IPC: G11C16/34 ,  G11C16/24 ,  G11C16/16 ,  G11C16/26 ,  G11C16/04 ,  G11C16/08

Abstract: Apparatuses and methods for reducing read disturb are described herein. An example apparatus may include a first memory subblock including a first select gate drain (SGD) switch and a first select gate source (SGS) switch, a second memory subblock including a second SGD switch and a second SGS switch, and an access line associated with the first and second memory subblocks. The apparatus may include a control unit configured to enable the first and second SGD switches and the first and second SGS switches during a first portion of a read operation and to provide a first voltage on the access line during the first portion. The control unit may be configured to disable the first SGD switch and the first SGS switches during a second portion of the read operation and to provide a second voltage on the access line during the second portion.

公开(公告)号：US10115457B2

公开(公告)日：2018-10-30

申请号：US15444982

申请日：2017-02-28

Applicant: Micron Technology, Inc.

Inventor： Qiang Tang ,  Feng Pan ,  Ramin Ghodsi ,  Mark A. Helm

IPC: G11C11/34 ,  G11C11/56

Abstract: Apparatuses and methods for threshold voltage (Vt) distribution determination are described. A number of apparatuses can include sense circuitry configured to determine a first current on a source line of an array of memory cells, the first current corresponding to a first quantity of memory cells of a group of memory cells that conducts in response to a first sensing voltage applied to an access line and determine a second current on the source line, the second current corresponding to a second quantity of memory cells of the group that conducts in response to a second sensing voltage applied to the access line. The number of apparatuses can include a controller configured to determine at least a portion of a Vt distribution corresponding to the group of memory cells based, at least in part, on the first current and the second current.

公开(公告)号：US20170169885A1

公开(公告)日：2017-06-15

申请号：US15444982

申请日：2017-02-28

Applicant: Micron Technology, Inc.

Inventor： Qiang Tang ,  Feng Pan ,  Ramin Ghodsi ,  Mark A. Helm

IPC: G11C11/56

CPC classification number: G11C11/5642 ,  G11C7/14 ,  G11C29/021 ,  G11C29/028 ,  G11C2029/0409

Abstract: Apparatuses and methods for threshold voltage (Vt) distribution determination are described. A number of apparatuses can include sense circuitry configured to determine a first current on a source line of an array of memory cells, the first current corresponding to a first quantity of memory cells of a group of memory cells that conducts in response to a first sensing voltage applied to an access line and determine a second current on the source line, the second current corresponding to a second quantity of memory cells of the group that conducts in response to a second sensing voltage applied to the access line. The number of apparatuses can include a controller configured to determine at least a portion of a Vt distribution corresponding to the group of memory cells based, at least in part, on the first current and the second current.

公开(公告)号：US20170033683A1

公开(公告)日：2017-02-02

申请号：US14813883

申请日：2015-07-30

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Feng Pan

IPC: H02M3/07

CPC classification number: H02M3/07 ,  H02M3/073 ,  H02M2001/0048 ,  H02M2003/075 ,  H02M2003/076 ,  Y02B70/1491

Abstract: Voltage generation circuits are useful in the generation of internal voltages for use in integrated circuits. Voltage generation circuits may include a stage capacitance and a voltage isolation device connected to the stage capacitance. The voltage isolation device may include a first current path between an input and an output of the voltage isolation device through a diode, and a second current path between the input and the output of the voltage isolation device through a gate. The gate is responsive to the contribution of a low-pass filter between the output of the voltage isolation device and the gate, and to the contribution of a high-pass filter between a clock signal node and the gate.

Abstract translation: 电压产生电路可用于产生集成电路中使用的内部电压。 电压产生电路可以包括级电容和连接到级电容的电压隔离装置。 电压隔离装置可以包括通过二极管的电压隔离装置的输入和输出之间的第一电流路径，以及通过栅极在电压隔离装置的输入和输出之间的第二电流路径。 栅极响应于电压隔离器件的输出与栅极之间的低通滤波器的贡献以及时钟信号节点和门之间的高通滤波器的贡献。

公开(公告)号：US20160351274A1

公开(公告)日：2016-12-01

申请号：US15164956

申请日：2016-05-26

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Feng Pan ,  Shigekazu Yamada

IPC: G11C29/50 ,  G11C5/06 ,  G11C7/20 ,  G11C7/08

CPC classification number: G11C29/50 ,  G11C16/06 ,  G11C29/025 ,  G11C2029/5006

Abstract: A first switch is closed to initialize a circuit by charging a capacitance of the circuit. A second switch is closed to initialize an amplifier in unity-gain configuration. The amplifier is capacitively coupled to the circuit. The first switch and the second switch are then opened to detect a leakage current of the circuit by detecting a change in an output voltage of the amplifier.

Abstract translation: 关闭第一开关以通过对电路的电容进行充电来初始化电路。 闭合的第二个开关以单位增益配置初始化放大器。 放大器电容耦合到电路。 然后打开第一开关和第二开关，以通过检测放大器的输出电压的变化来检测电路的漏电流。

公开(公告)号：US20160163396A1

公开(公告)日：2016-06-09

申请号：US14564821

申请日：2014-12-09

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Feng Pan ,  Xiaojiang Guo

IPC: G11C16/30

CPC classification number: G11C16/30 ,  G11C5/14

Abstract: A low-dropout regulator includes an error amplifier to provide a control signal, a first transistor, and a second transistor. The first transistor receives the control signal and has a source-drain path electrically coupled between a supply voltage node and a load, the first transistor to power the load in response to a voltage on the supply voltage node rising above an absolute value of a threshold voltage of the first transistor. The second transistor has a source-drain path electrically coupled between the supply voltage node and the load, the second transistor to receive the control signal in response to the voltage on the supply voltage node rising above a particular voltage.

Abstract translation: 低压差稳压器包括提供控制信号的误差放大器，第一晶体管和第二晶体管。 第一晶体管接收控制信号并且具有电耦合在电源电压节点和负载之间的源极 - 漏极路径，第一晶体管响应于电源电压节点上的电压升高到高于阈值的绝对值 第一晶体管的电压。 所述第二晶体管具有电耦合在所述电源电压节点和所述负载之间的源极 - 漏极路径，所述第二晶体管响应于所述电源电压节点上的电压升高到高于特定电压而接收所述控制信号。

公开(公告)号：US09349461B1

公开(公告)日：2016-05-24

申请号：US14558900

申请日：2014-12-03

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Feng Pan ,  Ramin Ghodsi

IPC: G11C11/34 ,  G11C16/10

CPC classification number: G11C16/10 ,  G11C16/0483 ,  G11C16/24 ,  G11C16/3427

Abstract: An embodiment of a method of programming might include applying a first voltage difference across a first memory cell to be programmed, where applying the first voltage difference comprises applying a first channel bias voltage to a channel of the first memory cell, and applying a second voltage difference, substantially equal to the first voltage difference, across a second memory cell to be programmed while applying the first voltage difference across the first memory cell, where applying the second voltage difference comprises applying a second channel bias voltage to a channel of the second memory cell. The first channel bias voltage is different than the second channel bias voltage, and the first memory cell and the second memory cell are commonly coupled to an access line and are at different locations along a length of the access line.

Abstract translation: 编程方法的一个实施例可以包括在待编程的第一存储器单元上施加第一电压差，其中施加第一电压差包括将第一通道偏置电压施加到第一存储器单元的通道，以及施加第二电压 在第一存储单元施加第一电压差的情况下跨越待编程的第二存储器单元实质上等于第一电压差的差值，其中施加第二电压差包括将第二通道偏置电压施加到第二存储器的通道 细胞。 第一通道偏置电压不同于第二通道偏置电压，并且第一存储器单元和第二存储单元通常耦合到接入线，并且沿着接入线的长度在不同的位置。