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    MEMORY AS A PROGRAMMABLE LOGIC DEVICE
    32.
    发明申请
    MEMORY AS A PROGRAMMABLE LOGIC DEVICE 审中-公开

    公开(公告)号：US20190272877A1

    公开(公告)日：2019-09-05

    申请号：US16413708

    申请日：2019-05-16

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Luca De Santis ,  Tommaso Vali ,  Kenneth J. Eldredge ,  Frankie F. Roohparvar

    IPC: G11C16/10 ,  G11C16/04

    Abstract: Memories include a data line, a plurality of strings of series-connected memory cells selectively connected to the data line, a plurality of first access lines each coupled to a control gate of a respective memory cell of each string of series-connected memory cells of the plurality of strings of series-connected memory cells, and a plurality of second access lines each coupled to a control gate of a respective memory cell of a respective string of series-connected memory cells of the plurality of strings of series-connected memory cells.

    Methods of operating memory
    33.
    发明授权
    Methods of operating memory 有权

    公开(公告)号：US10403371B2

    公开(公告)日：2019-09-03

    申请号：US16009541

    申请日：2018-06-15

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Tommaso Vali ,  Kenneth J. Eldredge ,  Frankie F. Roohparvar ,  Luca De Santis

    IPC: G11C16/26 ,  G06N3/04 ,  G06N3/063 ,  G11C16/04 ,  G11C7/10 ,  G11C16/08

    Abstract: Methods of operating memory include generating a data value indicative of a level of a property sensed from a data line while applying potentials to control gates of memory cells of more than one string of series-connected memory cells connected to that data line. Methods of operating memory further include generating data values indicative of levels of a property sensed from data lines while applying potentials to control gates of memory cells of strings of series-connected memory cells connected to those data lines, performing a logical operation on a set of data values comprising those data values, and determining a potential to be applied to control gates of different memory cells of those strings of series-connected memory cells in response to an output of the logical operation on the set of data values.

    Methods of operating a memory device comparing input data to data stored in memory cells coupled to a data line
    34.
    发明授权
    Methods of operating a memory device comparing input data to data stored in memory cells coupled to a data line 有权

    公开(公告)号：US10332605B2

    公开(公告)日：2019-06-25

    申请号：US15645009

    申请日：2017-07-10

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Kenneth J. Eldredge ,  Frankie F. Roohparvar ,  Luca De Santis ,  Tommaso Vali

    IPC: G11C15/00 ,  G11C16/28 ,  G11C15/04 ,  G11C16/04

    Abstract: Methods of operating a memory device include comparing input data to data stored in memory cells coupled to a data line, comparing a representation of a level of current in the data line to a reference, and determining that the input data potentially matches the data stored in the memory cells when the representation of the level of current in the data line is less than the reference. Methods of operating a memory device further include comparing input data to first data and to second data stored in memory cells coupled to a first data line or to a second data line, respectively, comparing representations of the levels of current in the first data line and in the second data line to a first reference and to a different second reference, and deeming one to be a closer match to the input data in response to results of the comparisons.

    METHODS AND APPARATUS FOR PATTERN MATCHING
    35.
    发明申请
    METHODS AND APPARATUS FOR PATTERN MATCHING 审中-公开

    公开(公告)号：US20180322922A1

    公开(公告)日：2018-11-08

    申请号：US16019650

    申请日：2018-06-27

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Luca De Santis ,  Tommaso Vali ,  Kenneth J. Eldredge ,  Vishal Sarin

    IPC: G11C15/04 ,  G11C16/10 ,  G11C16/04 ,  G11C29/52

    CPC classification number: G11C15/046 ,  G11C16/0483 ,  G11C16/10 ,  G11C29/52

    Abstract: Methods include receiving a pattern to be searched in a memory having a plurality of sets of memory elements with each set coupled to a separate data line and corresponding to a same set of bit positions of the pattern. Methods further include receiving a pattern of data to be programmed into a memory, programming a first data state into one memory cell of each cell pair of a plurality of cell pairs of a memory array, and programing a second data state into another memory cell of each cell pair of the plurality of cell pairs for each bit position of the pattern. Memory configured to facilitate such methods include a plurality of cell pairs, each cell pair of the plurality of cell pairs programmed to store a same bit of data corresponding to a particular bit position of a pattern to be searched in the memory.

    Memory as a programmable logic device
    38.
    发明授权
    Memory as a programmable logic device 有权
    存储器作为可编程逻辑器件

    公开(公告)号：US09343155B1

    公开(公告)日：2016-05-17

    申请号：US13774636

    申请日：2013-02-22

    Applicant: Micron Technology, Inc.

    Inventor： Luca De Santis ,  Tommaso Vali ,  Kenneth J. Eldredge ,  Frankie F. Roohparvar

    IPC: G11C16/04 ,  G11C16/10 ,  G11C16/34

    CPC classification number: G11C16/10 ,  G11C16/0483 ,  G11C16/26 ,  G11C16/3418

    Abstract: Methods for programming, methods for operating, and memories are disclosed. One such method for programming includes programming a group of memory cells such that a series string of memory cells of the group of memory cells is programmed to provide a logical function responsive to an input minterm whose variables are coupled to respective, associated memory cells.

    Abstract translation: 公开了编程方法，操作方法和存储器。 用于编程的一种这样的方法包括对一组存储器单元进行编程，使得存储器单元组的一系列存储器单元被编程为响应于其变量耦合到相应的存储单元的输入minter来提供逻辑功能。

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