摘要:
A method and apparatus for minimizing harmonic content in a digital signal driver circuit are disclosed. A digital input signal applied to an input node generates a corresponding digital output in a circuit with two or more MOS devices in cascode connection with each other. The slew rate of leading or trailing edge transitions associated with the output signal are controlled using one or more parasitic capacitances associated with the fabrication of two or cascode connected MOS devices. The two or more cascode connected MOS devices may further each have gate electrodes connected to a fixed potential so as to minimize the harmonic content. A control signal may further be applied to each gate electrode to turn off a leakage current path between source and drain electrodes. Harmonics may further be controlled by limiting a conductance between gate electrodes and fixed potentials using an active or passive device.
摘要:
A method and apparatus for frequency synthesis in a transceiver are based on providing a primary frequency synthesizer configured to synthesize a receiver frequency signal from a receiver reference frequency signal, and providing an offset frequency synthesizer configured to synthesize a transmitter frequency signal from the receiver frequency signal using fractional-N division, which allows it to operate at an intermediate frequency that is a non-integer multiple of the receiver frequency signal. That arrangement enables non-integer duplex frequency distances between desired receive and transmit frequencies. The primary frequency synthesizer also may be operated as a fractional-N frequency synthesizer, meaning that the receiver frequency signal may have a non-integer relationship to the receiver reference frequency signal. Configuring the primary and offset frequency synthesizers to operate with fractional-N frequency synthesis allows independent frequency tuning/optimization of the primary and secondary frequency synthesizers.
摘要:
An entire radio transceiver can be completely integrated into one IC chip. In order to integrate the IF filters on the chip, a heterodyne architecture with a low IF is used. A single, directly modulated VCO is used for both up-conversion during transmission, and down-conversion during reception. Bond-wires are used as resonators in the oscillator tank for the VCO. A TDD scheme is used in the air interface to eliminate cross-talk or leakage. A Gaussian-shaped binary FSK modulation scheme is used to provide a number of other implementation advantages.
摘要:
A dual-radio communication apparatus has a first radio device, such as a Bluetooth radio, for use in a first frequency band, and a second radio device, such as a Globalstar satellite radio, for use in a second frequency band, which is proximate to the first frequency band. The communication apparatus also has a controller coupled to the first and second radio devices. The first radio device may comprise a frequency-hopping spread-spectrum transmitter. Moreover, the first radio device has a first operating mode employing a first frequency range. The first radio device also has a second operating mode employing a second frequency range, which is smaller than the first frequency range. The controller is adapted to set the first radio device in its second operating mode, when the second radio device is in operation, and otherwise set the first radio device in its first operating mode.
摘要:
A method and apparatus for minimizing harmonic content in a digital signal driver circuit are disclosed. A digital input signal applied to an input node generates a corresponding digital output in a circuit with two or more MOS devices in cascode connection with each other. The slew rate of leading or trailing edge transitions associated with the output signal are controlled using one or more parasitic capacitances associated with the fabrication of two or cascode connected MOS devices. The two or more cascode connected MOS devices may further each have gate electrodes connected to a fixed potential so as to minimize the harmonic content. A control signal may further be applied to each gate electrode to turn off a leakage current path between source and drain electrodes. Harmonics may further be controlled by limiting a conductance between gate electrodes and fixed potentials using an active or passive device.
摘要:
The invention relates to an integrated gyrator structure, in which each transistor in the gyrator core (preferably MOS devices) has series feedback associated therewith. This allows for compensation over a large bandwidth of the effects of channel delay in the MOS transistors.
摘要:
An amplifier (10) is disclosed including circuity for improving the amplifiers performance, particularly the common mode rejection of differential amplifiers, by adding the amplifier input signal to the power supply signals which power the amplifier. Voltage dividers (42, 44) are connected between the amplifier output (16) and each of the two power supply rails (26, 28). Each divider includes resistors (46, 48; 50, 52) selected so that the amplifier output is divided down by a factor equal to the gain of the amplifier. The junction signals (V.sub.J1, V.sub.J2) provided by the two voltage dividers thus each includes a component equal to the input signal. The junction voltages are applied to the amplifier power input terminals (18, 20) by respective transistors (60, 62), each connected in a voltage follower arrangement. One embodiment (FIG. 4) incorporates a servo amplifier (100) for DC offset stabilization. Impedances (104, 106) couple the output of the servo amplifier to the voltage dividers so that no loss in common mode rejection results from servo operation.
摘要:
A frequency translation filter 500 is configured to receive a radio frequency (RF) signal 501 comprising first and second non-contiguous carriers or non-contiguous frequency ranges. The frequency translation filter comprises a mixer 503 configured to mix the RF signal 501 received on a first input with a local oscillator (LO) signal 505 received on a second input. A filter 507 comprises a frequency dependent load impedance, the filter having band-pass characteristics which, when frequency translated using the mixer 503, contain first and second pass-bands corresponding to the first and second non-contiguous carriers or non-contiguous frequency ranges. The first and second pass-bands are centered about the local oscillator frequency.
摘要:
A frequency translation filter 500 is configured to receive a radio frequency (RF) signal 501 comprising first and second non-contiguous carriers or non-contiguous frequency ranges. The frequency translation filter comprises a mixer 503 configured to mix the RF signal 501 received on a first input with a local oscillator (LO) signal 505 received on a second input. A filter 507 comprises a frequency dependent load impedance, the filter having band-pass characteristics which, when frequency translated using the mixer 503, contain first and second pass-bands corresponding to the first and second non-contiguous carriers or non-contiguous frequency ranges. The first and second pass-bands are centered about the local oscillator frequency.
摘要:
A digital affine transformation modulator and power amplifier drives a transmitter antenna. The modulator performs an affine transformation on a signal, wherein the I, Q space is mapped to a plurality of sectors. A signal in a sector is expressed as the sum of two vectors, the angles of which define the sector boundaries. A digital power amplifier comprises a plurality of amplifier cells, each cell comprising at least two amplifier units. For a given signal, each amplifier unit selectively amplifies a clock signal having a phase corresponding to one of the boundary angles of the signal's affine transformed sector. A subset of the plurality of amplifier cells receiving each phase clock signal are enabled, based on the magnitude of the associated vector describing the signal in affine transform space. The modulation scheme exhibits higher efficiency than quadrature modulation, without the bandwidth expansion and group delay mismatch of polar modulation.