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31.
公开(公告)号:US20200051312A1
公开(公告)日:2020-02-13
申请号:US16101066
申请日:2018-08-10
Applicant: NVIDIA Corporation
Inventor: Greg Muthler , Tero Karras , Samuli Laine , William Parsons Newhall, JR. , Ronald Charles Babich, JR. , John Burgess , Ignacio Llamas
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.
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公开(公告)号:US10002031B2
公开(公告)日:2018-06-19
申请号:US13890009
申请日:2013-05-08
Applicant: NVIDIA CORPORATION
Inventor: Ignacio Llamas , James David Balfour
CPC classification number: G06F9/52
Abstract: A first thread is placed into a blocked state by causing the thread to perform a blocking pop operation on a hardware-accelerated, single-entry queue. When a synchronization event completes, a second thread may release the first thread from the blocked state pushing a data value onto the hardware accelerated, single-entry queue. The push operation satisfies the blocking pop operation, and the first thread is released.
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33.
公开(公告)号:US09135081B2
公开(公告)日:2015-09-15
申请号:US13662274
申请日:2012-10-26
Applicant: NVIDIA Corporation
Inventor: Ignacio Llamas , Craig Ross Duttweiler , Jeffrey A. Bolz , Daniel Elliot Wexler
CPC classification number: G06F9/52 , G06F9/546 , G06F2209/548
Abstract: One embodiment of the present invention enables threads executing on a processor to locally generate and execute work within that processor by way of work queues and command blocks. A device driver, as an initialization procedure for establishing memory objects that enable the threads to locally generate and execute work, generates a work queue, and sets a GP_GET pointer of the work queue to the first entry in the work queue. The device driver also, during the initialization procedure, sets a GP_PUT pointer of the work queue to the last free entry included in the work queue, thereby establishing a range of entries in the work queue into which new work generated by the threads can be loaded and subsequently executed by the processor. The threads then populate command blocks with generated work and point entries in the work queue to the command blocks to effect processor execution of the work stored in the command blocks.
Abstract translation: 本发明的一个实施例使得在处理器上执行的线程能够通过工作队列和命令块来本地生成和执行该处理器内的工作。 设备驱动程序作为用于建立使线程本地生成和执行工作的内存对象的初始化过程,生成工作队列,并将工作队列的GP_GET指针设置为工作队列中的第一个条目。 在初始化过程中,设备驱动程序还将工作队列的GP_PUT指针设置到工作队列中包含的最后一个空闲条目,从而在工作队列中建立一个可以加载线程生成的新工作的条目范围 并随后由处理器执行。 然后,线程将工作队列中的生成工作和点条目的命令块填充到命令块,以执行存储在命令块中的工作的处理器执行。
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公开(公告)号:US20150022537A1
公开(公告)日:2015-01-22
申请号:US13946977
申请日:2013-07-19
Applicant: NVIDIA Corporation
Inventor: Eric B. Lum , Rouslan L. Dimitrov , Ignacio Llamas , Patrick James Neill , Yury Uralsky , Albert Meixner
CPC classification number: G06T11/40
Abstract: A system, method, and computer program product are provided for shading primitive fragments. A target buffer may be recast when shaded samples that are covered by a primitive fragment are generated at a first shading rate using a first sampling mode, the shaded samples are stored in the target buffer that is associated with the first sampling mode and the first shading rate, a second sampling mode is determined, and the target buffer is associated with the second sampling mode. A sampling mode and/or shading rate may be changed for a primitive. A primitive fragment that is associated with a first sampling mode and a first shading rate is received and a second sampling mode is determined for the primitive fragment. Shaded samples corresponding to the primitive fragment are generated, at a second shading rate, using the second sampling mode and the shaded samples are stored in a target buffer.
Abstract translation: 提供了一种系统,方法和计算机程序产品,用于着色原始片段。 当使用第一采样模式以第一阴影率产生由原始片段覆盖的阴影样本时,可以重写目标缓冲器,阴影样本存储在与第一采样模式和第一着色相关联的目标缓冲器中 速率,确定第二采样模式,并且目标缓冲器与第二采样模式相关联。 对于原语,可以改变采样模式和/或阴影率。 接收与第一采样模式和第一遮蔽速率相关联的原始片段,并且为原始片段确定第二采样模式。 使用第二采样模式以第二遮蔽速率生成与原始片段相对应的阴影样本,并将阴影样本存储在目标缓冲器中。
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35.
公开(公告)号:US20250118005A1
公开(公告)日:2025-04-10
申请号:US18911682
申请日:2024-10-10
Applicant: NVIDIA Corporation
Inventor: Greg MUTHLER , Tero Karras , Samuli Laine , William Parsons Newhall, JR. , Ronald Charles Babich, JR. , John Burgess , Ignacio Llamas
IPC: G06T15/06
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.
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公开(公告)号:US20250022216A1
公开(公告)日:2025-01-16
申请号:US18902629
申请日:2024-09-30
Applicant: NVIDIA Corporation
Inventor: Martin Stich , Ignacio Llamas , Steven Parker
Abstract: In various examples, shader bindings may be recorded in a shader binding table that includes shader records. Geometry of a 3D scene may be instantiated using object instances, and each may be associated with a respective set of the shader records using a location identifier of the set of shader records in memory. The set of shader records may represent shader bindings for an object instance under various predefined conditions. One or more of these predefined conditions may be implicit in the way the shader records are arranged in memory (e.g., indexed by ray type, by sub-geometry, etc.). For example, a section selector value (e.g., a section index) may be computed to locate and select a shader record based at least in part on a result of a ray tracing query (e.g., what sub-geometry was hit, what ray type was traced, etc.).
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公开(公告)号:US12198255B2
公开(公告)日:2025-01-14
申请号:US18471651
申请日:2023-09-21
Applicant: NVIDIA CORPORATION
Inventor: Samuli Laine , Timo Aila , Tero Karras , Gregory Muthler , William P. Newhall, Jr. , Ronald C Babich, Jr. , Craig Kolb , Ignacio Llamas , John Burgess
Abstract: Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and test parameters specified in the ray data structure and another test parameter specified in a node of the bounding volume hierarchy. In an example implementation a traversal coprocessor is configured to perform the traversal of the bounding volume hierarchy.
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公开(公告)号:US12124378B1
公开(公告)日:2024-10-22
申请号:US18137421
申请日:2023-04-20
Applicant: NVIDIA Corporation
Inventor: Gregory A. Muthler , Timo Aila , Tero Karras , Samuli Laine , William Parsons Newhall, Jr. , Ronald Charles Babich, Jr. , John Burgess , Ignacio Llamas
IPC: G06F12/00 , G06F12/0875 , G06F16/901 , G06T15/06
CPC classification number: G06F12/0875 , G06F16/9027 , G06T15/06 , G06T2207/20021
Abstract: In a ray tracer, a cache for streaming workloads groups ray requests for coherent successive bounding volume hierarchy traversal operations by sending common data down an attached data path to all ray requests in the group at the same time or about the same time. Grouping the requests provides good performance with a smaller number of cache lines.
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公开(公告)号:US20240257439A1
公开(公告)日:2024-08-01
申请号:US18612293
申请日:2024-03-21
Applicant: NVIDIA Corporation
Inventor: Shiqiu Liu , Christopher Ryan Wyman , Jon Hasselgren , Jacob Munkberg , Ignacio Llamas
CPC classification number: G06T15/06 , G06T5/20 , G06T5/70 , G06T15/506 , G06T15/60 , G06T2210/21
Abstract: Disclosed approaches may leverage the actual spatial and reflective properties of a virtual environment—such as the size, shape, and orientation of a bidirectional reflectance distribution function (BRDF) lobe of a light path and its position relative to a reflection surface, a virtual screen, and a virtual camera—to produce, for a pixel, an anisotropic kernel filter having dimensions and weights that accurately reflect the spatial characteristics of the virtual environment as well as the reflective properties of the surface. In order to accomplish this, geometry may be computed that corresponds to a projection of a reflection of the BRDF lobe below the surface along a view vector to the pixel. Using this approach, the dimensions of the anisotropic filter kernel may correspond to the BRDF lobe to accurately reflect the spatial characteristics of the virtual environment as well as the reflective properties of the surface.
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公开(公告)号:US11804000B2
公开(公告)日:2023-10-31
申请号:US17513023
申请日:2021-10-28
Applicant: NVIDIA CORPORATION
Inventor: Samuli Laine , Timo Aila , Tero Karras , Gregory Muthler , William P. Newhall, Jr. , Ronald C. Babich, Jr. , Craig Kolb , Ignacio Llamas , John Burgess
CPC classification number: G06T15/06 , G06T15/005 , G06T17/005
Abstract: Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and test parameters specified in the ray data structure and another test parameter specified in a node of the bounding volume hierarchy. In an example implementation a traversal coprocessor is configured to perform the traversal of the bounding volume hierarchy.
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