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37 条记录 (耗时 0.027 秒)

    Supporting multicast in NoC interconnect
    31.
    发明授权
    Supporting multicast in NoC interconnect 有权
    支持NoC互联组播

    公开(公告)号：US09590813B1

    公开(公告)日：2017-03-07

    申请号：US15265590

    申请日：2016-09-14

    申请人： NetSpeed Systems

    发明人： Sailesh Kumar ,  Eric Norige ,  Joe Rowlands ,  Joji Philip

    IPC分类号： H04L12/18 ,  H04L12/24 ,  H04L12/933 ,  H04L12/833

    CPC分类号： H04L12/1886 ,  H04L12/185 ,  H04L41/0823 ,  H04L41/0896 ,  H04L45/16 ,  H04L45/18 ,  H04L45/48 ,  H04L47/31 ,  H04L49/109

    摘要： Example implementations are directed to more efficiently delivering a multicast message to multiple destination components from a source component. Multicast environment is achieved with transmission of a single message from a source component, which gets replicated in the NoC during routing towards the destination components indicated in the message. Example implementations further relate to an efficient way of implementing multicast in any given NoC topology, wherein one or more multicast trees in the given NoC topology are formed and one of these trees are used for routing a multicast message to its intended destination components mentioned therein.

    摘要翻译： 示例性实现旨在从源组件更有效地将多播消息传递到多个目的地组件。 通过从源组件传输单个消息来实现组播环境，该组件在路由期间在NoC中被复制到消息中指示的目的地组件。 示例实现还涉及在任何给定的NoC拓扑中实现多播的有效方式，其中形成给定NoC拓扑中的一个或多个多播树，并且使用这些树中的一个将多播消息路由到其中提到的预期目的地组件。

    GENERATION OF NETWORK-ON-CHIP LAYOUT BASED ON USER SPECIFIED TOPOLOGICAL CONSTRAINTS
    32.
    发明申请
    GENERATION OF NETWORK-ON-CHIP LAYOUT BASED ON USER SPECIFIED TOPOLOGICAL CONSTRAINTS 审中-公开
    基于用户指定的拓扑约束的网络片上布局生成

    公开(公告)号：US20170063639A1

    公开(公告)日：2017-03-02

    申请号：US14625132

    申请日：2015-02-18

    申请人： NetSpeed Systems

    发明人： Pier Giorgio Raponi ,  Eric Norige ,  Sailesh Kumar

    IPC分类号： H04L12/24

    CPC分类号： H04L41/145 ,  G06F17/50 ,  H04L41/12

    摘要： In an aspect, the present disclosure provides a method that comprises automatic generation of a NoC from specified topological information based on projecting NoC elements of the NoC onto a grid layout. In an aspect, the specified topological information, including specification of putting constraints on positions/locations of NoC elements and links thereof, can be input by a user in real space, and can then be projected on the grid layout.

    摘要翻译： 在一方面，本公开提供了一种方法，其包括基于将NoC的NoC元素投影到网格布局上而从指定的拓扑信息中自动生成NoC。 在一方面，指定的拓扑信息（包括对NoC元素的位置/位置的约束的指定及其链接的规定）可以由用户在实际空间中输入，然后可以投影在网格布局上。

    TRANSACTION EXPANSION FOR NOC SIMULATION AND NOC DESIGN
    33.
    发明申请
    TRANSACTION EXPANSION FOR NOC SIMULATION AND NOC DESIGN 有权
    NOC模拟和NOC设计的交易扩展

    公开(公告)号：US20170060805A1

    公开(公告)日：2017-03-02

    申请号：US14620642

    申请日：2015-02-12

    申请人： NetSpeed Systems

    发明人： Eric Norige ,  Sailesh Kumar

    IPC分类号： G06F13/42 ,  H04L12/721

    CPC分类号： G06F13/4221 ,  H04L45/40

    摘要： Methods and example implementations described herein are generally directed to interconnect architecture, and more specifically, to generation of one or more expanded transactions for conducting simulations and/or NoC design. Aspects of the present disclosure include processing of input traffic specification that is given in terms of groups of hosts, requests, and responses to the requests, in order to generate one or more appropriate/correct expanded transactions that can be simulated.

    摘要翻译： 本文描述的方法和示例实现通常涉及互连架构，更具体地，涉及用于进行模拟和/或NoC设计的一个或多个扩展事务的生成。 本公开的方面包括根据主机组，请求和对请求的响应给出的输入流量规范的处理，以便生成可以被模拟的一个或多个适当/正确的扩展事务。

    Automatic power domain and voltage domain assignment to system-on-chip agents and network-on-chip elements
    34.
    发明授权
    Automatic power domain and voltage domain assignment to system-on-chip agents and network-on-chip elements 有权
    自动功率域和电压域分配给片上系统代理和片上网络元件

    公开(公告)号：US09529400B1

    公开(公告)日：2016-12-27

    申请号：US14527463

    申请日：2014-10-29

    申请人： NetSpeed Systems

    发明人： Sailesh Kumar ,  Eric Norige ,  Pier Giorgio Raponi

    IPC分类号： G06F1/26 ,  G06F1/32

    CPC分类号： G06F1/26 ,  G06F1/3243 ,  G06F1/3253 ,  G06F1/3278 ,  G06F1/3287 ,  G06F1/3296 ,  Y02D10/152 ,  Y02D10/157 ,  Y02D10/172

    摘要： The present disclosure relates system and method for automatic assignment of power domain and voltage domain to one or more SoC and/or NoC elements based on one or a combination of NoC and/or SoC specification/design, traffic specification, connectivity between SoC hosts that the NoC element in context is a part of, power specification (power domain and voltage domain of each host) of the hosts/SoC, and power profile(s) applicable for the NoC element in context. In another example implementation, power domain and voltage domain can be assigned to each SoC and/or NoC element based on pre-defined constraints and with an objective of reducing/minimizing static power consumption, reducing/minimizing hardware area, or identifying a tradeoff between the two parameters.

    摘要翻译： 本公开涉及基于NoC和/或SoC规范/设计，业务规范，SoC主机之间的连接的一个或者组合来自动分配功率域和电压域到一个或多个SoC和/或NoC元件的系统和方法， 上下文中的NoC元素是主机/ SoC的功率规格（每个主机的电源域和电压域）的一部分，以及上下文中适用于NoC元件的功率配置文件。 在另一示例实现中，功率域和电压域可以基于预定义的约束被分配给每个SoC和/或NoC元件，并且具有减少/最小化静态功耗，减少/最小化硬件面积或者识别在 两个参数。

    TRANSACTIONAL TRAFFIC SPECIFICATION FOR NETWORK-ON-CHIP DESIGN
    35.
    发明申请
    TRANSACTIONAL TRAFFIC SPECIFICATION FOR NETWORK-ON-CHIP DESIGN 有权
    网络芯片设计的交通交通规范

    公开(公告)号：US20150358211A1

    公开(公告)日：2015-12-10

    申请号：US14298717

    申请日：2014-06-06

    申请人： NetSpeed Systems

    发明人： Sailesh Kumar ,  Eric Norige ,  Pier Giorgio Raponi

    IPC分类号： H04L12/24 ,  H04L12/733 ,  H04L12/933

    CPC分类号： H04L41/145 ,  H04L41/0806 ,  H04L45/122 ,  H04L49/109

    摘要： Example implementations described herein are directed to a consolidated specification with information to generate and optimize the NoC. The consolidated specification can also facilitate the generation of traffic trace files. Based on the trace files, performance simulation where packets are injected in the NoC can be conducted. The consolidated specification can include parameters for bandwidth, traffic, jitter, dependency information, and attribute information depending on the desired implementation.

    摘要翻译： 本文描述的示例实现涉及具有用于生成和优化NoC的信息的统一规范。 统一规范也可以方便生成流量跟踪文件。 基于跟踪文件，可以进行在NoC中注入数据包的性能模拟。 综合规范可以包括带宽，流量，抖动，依赖性信息和属性信息的参数，这取决于所需的实现。

    Heterogeneous SoC IP core placement in an interconnect to optimize latency and interconnect performance
    36.
    发明授权
    Heterogeneous SoC IP core placement in an interconnect to optimize latency and interconnect performance 有权
    互连中的异构SoC IP核放置，以优化延迟和互连性能

    公开(公告)号：US09185023B2

    公开(公告)日：2015-11-10

    申请号：US13886753

    申请日：2013-05-03

    申请人： NetSpeed Systems

    发明人： Eric Norige ,  Sailesh Kumar

    IPC分类号： G06F17/50 ,  H04L12/721

    CPC分类号： H04L41/12 ,  H04L41/147 ,  H04L45/06

    摘要： Systems and methods described herein are directed to solutions for Network on Chip (NoC) interconnects that automatically and dynamically determines the position of hosts of various size and shape in a NoC topology based on the connectivity, bandwidth and latency requirements of the system traffic flows and certain performance optimization metrics such as system interconnect latency and interconnect cost. The example embodiments selects hosts for relocation consideration and determines a new possible position for them in the NoC based on the system traffic specification, shape and size of the hosts and by using probabilistic function to decide if the relocation is carried out or not. The procedure is repeated over new sets of hosts until certain optimization targets are satisfied or repetition count is exceeded.

    摘要翻译： 本文描述的系统和方法针对基于片上网络（NoC）互连的解决方案，其基于系统业务流的连接性，带宽和等待时间要求，在NoC拓扑中自动和动态地确定各种大小和形状的主机的位置，以及 某些性能优化指标，如系统互连延迟和互连成本。 示例性实施例选择主机进行重新定位考虑，并且基于系统流量规范，主机的形状和大小，并且通过使用概率函数来确定是否执行重新定位，在NoC中为它们确定新的可能位置。 该过程在新的主机集上重复，直到满足某些优化目标或超过重复计数。