公开(公告)号：US5699605A

公开(公告)日：1997-12-23

申请号：US421429

申请日：1995-04-12

申请人： Nurul Amin ,  John Bortins ,  Ying Yan

发明人： Nurul Amin ,  John Bortins ,  Ying Yan

IPC分类号： G11B5/31 ,  G11B5/42

CPC分类号： G11B5/3163 ,  G11B5/3103 ,  G11B5/313 ,  Y10T29/49044

摘要： A thin film magnetic head is carried in a recessed region which is etched in a basecoat. The thin film magnetic head includes upper and lower pole pieces having an upper pole tip and a lower pole tip, respectively. The upper and lower pole tips form a magnetic flux gap. Electrical conductors are carried in an insulating layer between the upper and lower pole pieces. The magnetic flux gap defines a plane which is generally parallel with a plane defined by the conductors. The electrical conductors lie on either side of the plane.

摘要翻译： 薄膜磁头被承载在基底蚀刻的凹陷区域中。 薄膜磁头包括分别具有上极端和下极端的上极片和下磁极片。 上下极尖形成磁通隙。 电导体承载在上极靴和下极靴之间的绝缘层中。 磁通量间隙限定了与由导体限定的平面大致平行的平面。 电导体位于平面的两侧。

公开(公告)号：US5181152A

公开(公告)日：1993-01-19

申请号：US660410

申请日：1991-02-22

申请人： Ying D. Yan ,  John Bortins ,  Beat G. Keel ,  Nurul Amin

发明人： Ying D. Yan ,  John Bortins ,  Beat G. Keel ,  Nurul Amin

IPC分类号： G11B5/31

CPC分类号： G11B5/3143 ,  Y10T29/49032

摘要： A thin film magnetic read/write head deposited upon a non-magnetic substrate reduces leading edge undershoots in readback pulse signal. A magnetic layer is deposited between the thin film magnetic read/write head and the non-magnetic substrate. Undershoots are reduced by making the leading edge of the thin film head less sensitive to the magnetization transitions in a magnetic storage medium.

摘要翻译： 沉积在非磁性衬底上的薄膜磁读/写头减少了回读脉冲信号中的前沿下冲。 磁性层沉积在薄膜磁读/写头和非磁性基片之间。 通过使薄膜头的前缘对磁存储介质中的磁化转变较不敏感来减少下冲。

公开(公告)号：US08289751B2

公开(公告)日：2012-10-16

申请号：US13117849

申请日：2011-05-27

申请人： Wei Tian ,  Nurul Amin ,  Insik Jin ,  Ming Sun ,  Venu Vaithyanathan ,  YoungPil Kim ,  Chulmin Jung

发明人： Wei Tian ,  Nurul Amin ,  Insik Jin ,  Ming Sun ,  Venu Vaithyanathan ,  YoungPil Kim ,  Chulmin Jung

IPC分类号： G11C11/00

CPC分类号： G11C13/003 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0011 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0073 ,  G11C2213/15 ,  G11C2213/31 ,  G11C2213/32 ,  G11C2213/56 ,  G11C2213/76

摘要： A non-volatile memory cell with a programmable unipolar switching element, and a method of programming the memory element are disclosed. In some embodiments, the memory cell comprises a programmable bipolar resistive sense memory element connected in series with a programmable unipolar resistive sense switching element. The memory element is programmed to a selected resistance state by application of a selected write current in a selected direction through the cell, wherein a first resistance level is programmed by passage of a write current in a first direction and wherein a second resistance level is programmed by passage of a write current in an opposing second direction. The switching element is programmed to a selected resistance level to facilitate access to the selected resistance state of the memory element.

摘要翻译： 公开了一种具有可编程单极开关元件的非易失性存储单元，以及编程存储器元件的方法。 在一些实施例中，存储单元包括与可编程单极性电阻感测开关元件串联连接的可编程双极性电阻读出存储元件。 通过在所选择的方向上通过单元施加选择的写入电流将存储元件编程为所选择的电阻状态，其中通过沿第一方向的写入电流来编程第一电阻电平，并且其中第二电阻电平被编程 通过在相反的第二方向上的写入电流。 开关元件被编程为所选择的电阻水平以便于访问存储元件的所选择的电阻状态。

公开(公告)号：US08203875B2

公开(公告)日：2012-06-19

申请号：US13014917

申请日：2011-01-27

申请人： Nurul Amin ,  Insik Jim ,  Venugopalan Vaithyanathan ,  Wei Tian ,  YoungPil Kim

发明人： Nurul Amin ,  Insik Jim ,  Venugopalan Vaithyanathan ,  Wei Tian ,  YoungPil Kim

IPC分类号： G11C11/36

CPC分类号： H01L27/224 ,  G11C11/1659 ,  G11C13/0007 ,  G11C13/0011 ,  H01L27/1021

摘要： An anti-parallel diode structure and method of fabrication is presently disclosed. In some embodiments, an anti-parallel diode structure has a semiconductor region comprising a first insulator layer disposed between a first semiconductor layer and a second semiconductor layer. The semiconductor region can be bound on a first side by a first metal material and bound on a second side by a second metal material so that current below a predetermined value is prevented from passing through the semiconductor region and current above the predetermined value passes through the semiconductor region.

摘要翻译： 目前公开了一种反并联二极管结构和制造方法。 在一些实施例中，反并联二极管结构具有包括设置在第一半导体层和第二半导体层之间的第一绝缘体层的半导体区域。 半导体区域可以通过第一金属材料在第一侧上结合并且通过第二金属材料在第二侧上结合，使得防止低于预定值的电流通过半导体区域，并且超过预定值的电流通过 半导体区域。

公开(公告)号：US08199570B2

公开(公告)日：2012-06-12

申请号：US12900314

申请日：2010-10-07

申请人： Nurul Amin ,  Johannes Van Ek

发明人： Nurul Amin ,  Johannes Van Ek

IPC分类号： G11C11/15

CPC分类号： G11C11/5607 ,  G11B5/02 ,  G11B5/66 ,  G11B5/746 ,  G11C11/161 ,  G11C11/1675

摘要： An apparatus and associated method for a multi-bit memory capable of being selected with a magnetic layer. Various embodiments of the present invention are generally directed to a first selection layer with a low coercivity that is disposed between first and second storage layers that each have a high coercivity. In response to magnetic saturation of the first selection layer, programming of a logical state to the second storage layer is allowed.

摘要翻译： 一种用于能够用磁性层选择的多位存储器的装置和相关方法。 本发明的各种实施方案通常涉及具有低矫顽力的第一选择层，其设置在第一和第二存储层之间，每个具有高矫顽力。 响应于第一选择层的磁饱和，允许将逻辑状态编程到第二存储层。

公开(公告)号：US08158964B2

公开(公告)日：2012-04-17

申请号：US12502221

申请日：2009-07-13

申请人： Young Pil Kim ,  Nurul Amin ,  Dadi Setiadi ,  Venugopalan Vaithyanathan ,  Wei Tian ,  Insik Jin

发明人： Young Pil Kim ,  Nurul Amin ,  Dadi Setiadi ,  Venugopalan Vaithyanathan ,  Wei Tian ,  Insik Jin

IPC分类号： H01L29/02 ,  H01L29/47

CPC分类号： H01L27/0814 ,  G11C11/161 ,  G11C11/1659 ,  G11C13/0002 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/101 ,  H01L27/1021 ,  H01L27/11507 ,  H01L27/1203 ,  H01L27/224 ,  H01L27/2409 ,  H01L29/66143 ,  H01L29/66212 ,  H01L29/872 ,  H01L45/04 ,  H01L45/06 ,  H01L45/085 ,  H01L45/14 ,  H01L45/143 ,  H01L45/146 ,  H01L45/147

摘要： A switching element that includes a first semiconductor layer, the first semiconductor layer having a first portion and a second portion; a second semiconductor layer, the second semiconductor layer having a first portion and a second portion; an insulating layer disposed between the first semiconductor layer and the second semiconductor layer; a first metal contact in contact with the first portion of the first semiconductor layer forming a first junction and in contact with the first portion of the second semiconductor layer forming a second junction; a second metal contact in contact with the second portion of the first semiconductor layer forming a third junction and in contact with the second portion of the second semiconductor layer forming a fourth junction, wherein the first junction and the fourth junction are Schottky contacts, and the second junction and the third junction are ohmic contacts.

公开(公告)号：US20110228599A1

公开(公告)日：2011-09-22

申请号：US13117849

申请日：2011-05-27

申请人： Wei Tian ,  Nurul Amin ,  Insik Jin ,  Ming Sun ,  Venu Vaithyanathan ,  YoungPil Kim ,  Chulmin Jung

发明人： Wei Tian ,  Nurul Amin ,  Insik Jin ,  Ming Sun ,  Venu Vaithyanathan ,  YoungPil Kim ,  Chulmin Jung

IPC分类号： G11C11/00

CPC分类号： G11C13/003 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0011 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0073 ,  G11C2213/15 ,  G11C2213/31 ,  G11C2213/32 ,  G11C2213/56 ,  G11C2213/76

摘要： A non-volatile memory cell with a programmable unipolar switching element, and a method of programming the memory element are disclosed. In some embodiments, the memory cell comprises a programmable bipolar resistive sense memory element connected in series with a programmable unipolar resistive sense switching element. The memory element is programmed to a selected resistance state by application of a selected write current in a selected direction through the cell, wherein a first resistance level is programmed by passage of a write current in a first direction and wherein a second resistance level is programmed by passage of a write current in an opposing second direction. The switching element is programmed to a selected resistance level to facilitate access to the selected resistance state of the memory element.

摘要翻译： 公开了一种具有可编程单极开关元件的非易失性存储单元，以及编程存储器元件的方法。 在一些实施例中，存储单元包括与可编程单极性电阻感测开关元件串联连接的可编程双极性电阻读出存储元件。 通过在所选择的方向上通过单元施加选择的写入电流将存储元件编程为所选择的电阻状态，其中通过沿第一方向的写入电流来编程第一电阻电平，并且其中第二电阻电平被编程 通过在相反的第二方向上的写入电流。 开关元件被编程为所选择的电阻水平以便于访问存储元件的所选择的电阻状态。

公开(公告)号：US07974117B2

公开(公告)日：2011-07-05

申请号：US12497964

申请日：2009-07-06

申请人： Wei Tan ,  Nurul Amin ,  Insik Jim ,  Ming Sun ,  Venu Vaithyanathan ,  YoungPil Kim ,  Chulmin Jung

发明人： Wei Tan ,  Nurul Amin ,  Insik Jim ,  Ming Sun ,  Venu Vaithyanathan ,  YoungPil Kim ,  Chulmin Jung

IPC分类号： G11C11/00

CPC分类号： G11C13/003 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0011 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0073 ,  G11C2213/15 ,  G11C2213/31 ,  G11C2213/32 ,  G11C2213/56 ,  G11C2213/76

摘要： A non-volatile memory cell with a programmable unipolar switching element, and a method of programming the memory element are disclosed. In some embodiments, the memory cell comprises a programmable bipolar resistive sense memory element connected in series with a programmable unipolar resistive sense switching element. The memory element is programmed to a selected resistance state by application of a selected write current in a selected direction through the cell, wherein a first resistance level is programmed by passage of a write current in a first direction and wherein a second resistance level is programmed by passage of a write current in an opposing second direction. The switching element is programmed to a selected resistance level to facilitate access to the selected resistance state of the memory element.

摘要翻译： 公开了一种具有可编程单极开关元件的非易失性存储单元，以及编程存储器元件的方法。 在一些实施例中，存储单元包括与可编程单极性电阻感测开关元件串联连接的可编程双极性电阻读出存储元件。 通过在所选择的方向上通过单元施加选择的写入电流将存储元件编程为所选择的电阻状态，其中通过沿第一方向的写入电流来编程第一电阻电平，并且其中第二电阻电平被编程 通过在相反的第二方向上的写入电流。 开关元件被编程为所选择的电阻水平以便于访问存储元件的所选择的电阻状态。

公开(公告)号：US07957091B2

公开(公告)日：2011-06-07

申请号：US11656714

申请日：2007-01-23

申请人： Roger Hipwell ,  Nurul Amin ,  John Pendray ,  Andrew White ,  Bradley Ver Meer ,  Hans Leuthold ,  Menachem Rafaelof ,  Wayne Bonin

发明人： Roger Hipwell ,  Nurul Amin ,  John Pendray ,  Andrew White ,  Bradley Ver Meer ,  Hans Leuthold ,  Menachem Rafaelof ,  Wayne Bonin

IPC分类号： G11B17/02

CPC分类号： G11B5/725 ,  G11B33/123

摘要： A device comprises a fluid bearing including a textured fluid bearing surface and a second surface and a recordable disc. The recordable disc includes a substrate, a recordable media layer on the substrate, and at least one of the textured fluid bearing surface and the second surface. The device may be manufactured using MEMS techniques. MEMS techniques provide the high precision necessary to create the textured fluid bearing surface. MEMS techniques also allow the recordable disc to be batch-fabricated with one or more additional recordable discs.

摘要翻译： 一种装置包括流体轴承，其包括纹理流体支承表面和第二表面以及可记录盘。 可记录盘包括衬底，衬底上的可记录介质层以及纹理流体支承表面和第二表面中的至少一个。 该装置可以使用MEMS技术制造。 MEMS技术提供了创建纹理流体支承表面所需的高精度。 MEMS技术还允许可记录盘用一个或多个附加可记录盘批量制造。

公开(公告)号：US20110006276A1

公开(公告)日：2011-01-13

申请号：US12502221

申请日：2009-07-13

申请人： Young Pil Kim ,  Nurul Amin ,  Dadi Setiadi ,  Venugopalan Vaithyanathan ,  Wei Tian ,  Insik Jin

发明人： Young Pil Kim ,  Nurul Amin ,  Dadi Setiadi ,  Venugopalan Vaithyanathan ,  Wei Tian ,  Insik Jin

IPC分类号： H01L45/00 ,  H01L29/868 ,  H01L21/30

CPC分类号： H01L27/0814 ,  G11C11/161 ,  G11C11/1659 ,  G11C13/0002 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/101 ,  H01L27/1021 ,  H01L27/11507 ,  H01L27/1203 ,  H01L27/224 ,  H01L27/2409 ,  H01L29/66143 ,  H01L29/66212 ,  H01L29/872 ,  H01L45/04 ,  H01L45/06 ,  H01L45/085 ,  H01L45/14 ,  H01L45/143 ,  H01L45/146 ,  H01L45/147

摘要： A switching element that includes a first semiconductor layer, the first semiconductor layer having a first portion and a second portion; a second semiconductor layer, the second semiconductor layer having a first portion and a second portion; an insulating layer disposed between the first semiconductor layer and the second semiconductor layer; a first metal contact in contact with the first portion of the first semiconductor layer forming a first junction and in contact with the first portion of the second semiconductor layer forming a second junction; a second metal contact in contact with the second portion of the first semiconductor layer forming a third junction and in contact with the second portion of the second semiconductor layer forming a fourth junction, wherein the first junction and the fourth junction are Schottky contacts, and the second junction and the third junction are ohmic contacts.

摘要翻译： 一种开关元件，包括第一半导体层，所述第一半导体层具有第一部分和第二部分; 第二半导体层，所述第二半导体层具有第一部分和第二部分; 设置在所述第一半导体层和所述第二半导体层之间的绝缘层; 与所述第一半导体层的所述第一部分接触的第一金属触点，形成第一结，并与所述第二半导体层的所述第一部分接触形成第二结; 第二金属触点与第一半导体层的第二部分接触形成第三结，并与第二半导体层的第二部分接触形成第四结，其中第一结和第四结是肖特基接触， 第二结和第三结是欧姆接触。