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公开(公告)号：US20240080855A1
公开(公告)日：2024-03-07
申请号：US18507868
申请日：2023-11-13
Inventor： Ayako HORIUCHI , Hidetoshi SUZUKI , Lilei WANG
IPC: H04W72/23 , H04L1/00 , H04L1/1829
CPC classification number: H04W72/23 , H04L1/0004 , H04L1/0038 , H04L1/0072 , H04L1/1861
Abstract: A terminal is disclosed, which is capable of appropriately determining a resource to which a DCI is mapped. A DCI receiver (203) receives first and second downlink (DL) control signals, and a signal demultiplexer (202) demultiplexes a DL data signal from a received signal, using the first and the second DL control signals. The DCI receiver (203) identifies a resource for the second DL control signal based on information on the first DL control signal, or information on the DL data signal, indicated by the first DL control signal.
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公开(公告)号：US20240056977A1
公开(公告)日：2024-02-15
申请号：US17766178
申请日：2020-09-09
Inventor： Hongchao LI , Hidetoshi SUZUKI , Quan KUANG , Ayako HORIUCHI
IPC: H04W52/02
CPC classification number: H04W52/0235
Abstract: Provided is a user equipment (UE), a scheduling node, and communication methods for UE and, respectively, scheduling node. The UE comprises a transceiver which, in operation, receives a configuration of a PoSS (power saving signal) time window for monitoring a PoSS and preceding a DRX (discontinuous reception) ON period for monitoring a PDCCH (physical downlink control channel), wherein the PoSS indicates whether or not the UE starts monitoring for the PDCCH in the DRX ON period and circuitry which, in operation, determines, based on the configuration, the PoSS time window, and controls the transceiver to perform monitoring for the PoSS within the PoSS time window.
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公开(公告)号：US20230412340A1
公开(公告)日：2023-12-21
申请号：US18248506
申请日：2021-07-01
Inventor： Shotaro MAKI , Hidetoshi SUZUKI , Hongchao LI , Ayako HORIUCHI , Akihiko NISHIO , Xuan Tuong TRAN , Yoshihiko OGAWA
IPC: H04L5/00 , H04W72/232
CPC classification number: H04L5/0051 , H04W72/232
Abstract: According to the present invention, the received quality of a terminal is improved. The terminal comprises: a reception circuit (202) which receives information for providing a notification of the port of a reference signal for a downlink data signal; and a control circuit (208) which controls the reception of the downlink data signal and the reference signal, on the basis of a number of ranks less than the number of ports indicated by the received information.
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公开(公告)号：US20230403170A1
公开(公告)日：2023-12-14
申请号：US18455906
申请日：2023-08-25
Inventor： Ayako HORIUCHI , Hidetoshi SUZUKI , Lilei WANG , Takashi IWAI
CPC classification number: H04L9/40 , H04W28/0273
Abstract: A terminal includes circuitry and a transmitter. The circuitry, in operation, determines a first transmission power for a first uplink signal and a second transmission power for a second uplink signal by prioritizing allocation of a transmission power to the second transmission power for the second uplink signal, responsive to, in a first transmission time interval (TTI) where the first uplink signal is transmitted, the second uplink signal being transmitted in a second TTI that is shorter than the first TTI. The transmitter, in operation, transmits the first uplink signal with the determined first transmission power and transmits the second uplink signal with the determined second transmission power.
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公开(公告)号：US20230353331A1
公开(公告)日：2023-11-02
申请号：US18350607
申请日：2023-07-11
Inventor： Tetsuya YAMAMOTO , Alexander GOLITSCHEK EDLER VON ELBWART , Lilei WANG , Ayako HORIUCHI , Hidetoshi SUZUKI
CPC classification number: H04L5/0092 , H04W72/20 , H04L5/001 , H04L5/0048 , H04W72/0453
Abstract: A communication apparatus includes circuitry that determines a number of resource blocks forming a resource block group, which is a unit used to allocate a resource to the communication apparatus, in a first band or in a second band that is an expanded band to which the first band is expanded, and a subcarrier spacing for the second band is same or different from a subcarrier spacing for the first band; and a transceiver that is coupled to the circuitry and that communicates with a base station using the resource. One of the number of resource blocks set for the first band and the number of resource blocks set for the second band is an integer multiple of the other, and the number of resource blocks set for the first band and the number of resource blocks set for the second band are values that are a power of two.
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Patent Agency Ranking
公开(公告)号：US20230300760A1
公开(公告)日：2023-09-21
申请号：US18006543
申请日：2021-02-18
Inventor： Tetsuya YAMAMOTO , Hidetoshi SUZUKI , Takashi IWAI , Akihiko NISHIO , Ayako HORIUCHI , Yasuaki YUDA
CPC classification number: H04W52/367 , H04W52/10 , H04W52/242
Abstract: A terminal is provided with a reception circuit for receiving information from a second node that pertains to the determination of the parameter used for open-loop control for a first node, and a control circuit for exercising open-loop control on the basis of the information.
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公开(公告)号：US20230291520A1
公开(公告)日：2023-09-14
申请号：US18004906
申请日：2021-06-22
Inventor： Takashi IWAI , Ayako HORIUCHI , Akihiko NISHIO
IPC: H04L5/00
CPC classification number: H04L5/0048
Abstract: The present invention improves reference signal transmission efficiency. A terminal is equipped with: a reception circuit for receiving information indicating some of a plurality of candidate unit-time resources for non-periodic transmission of reference signals: and a control circuit for, on the basis of the information, controlling the allocation of time resources to be used in the transmission of reference signals.
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公开(公告)号：US20230276347A1
公开(公告)日：2023-08-31
申请号：US18007452
申请日：2021-05-25
Inventor： Shotaro MAKI , Hongchao LI , Xuan Tuong TRAN , Akihiko NISHIO , Takashi IWAI , Ayako HORIUCHI , Hidetoshi SUZUKI
IPC: H04W48/10
CPC classification number: H04W48/10
Abstract: The purpose of the present invention is to improve the received quality of a synchronization signal in a terminal. The terminal is equipped with: a reception circuit that receives a first synchronization signal block and a second synchronization signal block that is different from the first synchronization signal block in at least one of the sequence and the signal position; and a control circuit that performs a cell search on the basis of the first synchronization signal block and the second synchronization signal block.
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公开(公告)号：US20230262723A1
公开(公告)日：2023-08-17
申请号：US18298804
申请日：2023-04-11
Inventor： Tetsuya YAMAMOTO , Ayako HORIUCHI , Takashi IWAI
IPC: H04W72/23 , H04L5/00 , H04L1/18 , H04L5/14 , H04L1/1829 , H04L69/324 , H04W28/04
CPC classification number: H04W72/23 , H04L5/0053 , H04L1/18 , H04L5/1469 , H04L5/0055 , H04L5/0044 , H04L1/1861 , H04L1/1858 , H04L1/1854 , H04L69/324 , H04W28/04 , H04W88/02
Abstract: A terminal includes a receiver, which, in operation, receives time unit information related to an amount of an uplink time resource per a time unit, and receives a number of repetitions over a plurality of the time units, wherein the time unit includes a downlink time resource for a downlink signal and the uplink time resource for a response signal. The amount of the uplink time resource is expressed as a fixed number of consecutive symbols that remains the same number over the plurality of the time units over which the response signal is repeatedly transmitted. The terminal includes a transmitter, which, in operation, repeatedly transmits the response signal over the plurality of the time units.
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公开(公告)号：US20230130813A1
公开(公告)日：2023-04-27
申请号：US18069855
申请日：2022-12-21
Inventor： Ayako HORIUCHI , Lilei WANG , Alexander GOLITSCHEK EDLER VON ELBWART , Hidetoshi SUZUKI , Kazuki TAKEDA
Abstract: A communication apparatus includes a circuitry and a transmitter. In operation, the circuitry generates a Demodulation Reference Signal (DMRS) and generates downlink control information indicating a mapping pattern of the DMRS from a plurality of mapping patterns, and the transmitter transmits the DMRS and the downlink control information. The plurality of mapping patterns include a first mapping pattern and a second mapping pattern. Resource elements used for the DMRS of the second mapping pattern are same as a part of resource elements used for the DMRS of the first mapping pattern. A number of the resource elements used for the DMRS of the first mapping pattern is larger than a number of the resource elements used for the DMRS of the second mapping pattern.
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