公开(公告)号：US12130772B2

公开(公告)日：2024-10-29

申请号：US17971964

申请日：2022-10-24

Applicant: Rambus Inc.

Inventor： Michael Raymond Miller ,  Evan Lawrence Erickson

IPC: G06F15/78 ,  G06F21/72

CPC classification number: G06F15/7807 ,  G06F21/72

Abstract: A multi-processor device is disclosed. The multi-processor device includes interface circuitry to receive requests from at least one host device. A primary processor is coupled to the interface circuitry to process the requests in the absence of a failure event associated with the primary processor. A secondary processor processes operations on behalf of the primary processor and selectively receives the requests from the interface circuitry based on detection of the failure event associated with the primary processor.

公开(公告)号：US20240194231A1

公开(公告)日：2024-06-13

申请号：US18531543

申请日：2023-12-06

Applicant: Rambus Inc.

Inventor： Taeksang Song ,  Evan Lawrence Erickson ,  Steven C. Woo

IPC: G11C7/10 ,  G11C7/24

CPC classification number: G11C7/1069 ,  G11C7/1039 ,  G11C7/1063 ,  G11C7/24

Abstract: A buffer integrated circuit (IC) chip is disclosed. The buffer IC chip includes host interface circuitry to receive a read command to retrieve read data from a memory. Memory interface circuitry couples to the memory. Data freshness authentication circuitry performs a freshness verification operation on the read data. Read data forwarding circuitry, in a skid mode of operation, transmits the read data to the host prior to completion of the freshness verification operation.

公开(公告)号：US20240160388A1

公开(公告)日：2024-05-16

申请号：US18497860

申请日：2023-10-30

Applicant: Rambus Inc.

Inventor： Taeksang Song ,  Evan Lawrence Erickson ,  Wendy Elsasser

IPC: G06F3/06

CPC classification number: G06F3/0689 ,  G06F3/0623 ,  G06F3/0656 ,  G06F3/0659

Abstract: A memory buffer device facilitates secure read and write operations associated with data that includes a predefined data pattern. For read operations, the memory buffer device detects a read data pattern in the read data that matches a predefined data pattern. The memory buffer device may then generate a read response that includes metadata identifying the read data pattern without sending the read data itself. The memory buffer device may also receive Write Request without Data (RwoD) commands from the host that include metadata identifying a write data pattern. The memory buffer device identifies the associated data pattern and writes the data pattern or the metadata to the memory array. The memory buffer device may include encryption and decryption logic for communicating the metadata in encrypted form.

公开(公告)号：US20230350603A1

公开(公告)日：2023-11-02

申请号：US18139190

申请日：2023-04-25

Applicant: Rambus Inc.

Inventor： Taeksang Song ,  Evan Lawrence Erickson ,  Craig E. Hampel

IPC: G06F3/06

CPC classification number: G06F3/0658 ,  G06F3/0622 ,  G06F3/0679

Abstract: Technologies for securing dynamic random access memory contents to nonvolatile memory in a persistent memory module are described. One persistent memory module includes an inline memory encryption (IME) circuit that receives a data stream from a host, encrypts the data stream into encrypted data, and stores the encrypted data in DRAM. A management processor transfers the encrypted data from the DRAM to persistent storage memory responsive to a signal associated with a power-loss or power-down event.

公开(公告)号：US11663138B2

公开(公告)日：2023-05-30

申请号：US17543449

申请日：2021-12-06

Applicant: Rambus Inc.

Inventor： Evan Lawrence Erickson ,  Christopher Haywood ,  Mark D. Kellam

IPC: G06F12/10 ,  G06F12/1009 ,  G06F13/16 ,  G06F12/0804 ,  G06F12/123 ,  G06F12/0882

CPC classification number: G06F12/1009 ,  G06F12/0804 ,  G06F12/0882 ,  G06F12/123 ,  G06F13/1668 ,  G06F2212/7201

Abstract: Memory pages are background-relocated from a low-latency local operating memory of a server computer to a higher-latency memory installation that enables high-resolution access monitoring and thus access-demand differentiation among the relocated memory pages. Higher access-demand memory pages are background-restored to the low-latency operating memory, while lower access-demand pages are maintained in the higher latency memory installation and yet-lower access-demand pages are optionally moved to yet higher-latency memory installation.

公开(公告)号：US20230163964A1

公开(公告)日：2023-05-25

申请号：US17990417

申请日：2022-11-18

Applicant: Rambus Inc.

Inventor： Evan Lawrence Erickson ,  Joel Wittenauer ,  Winthrop John Wu

IPC: H04L9/08

CPC classification number: H04L9/0877 ,  H04L9/0816

Abstract: An integrated circuit comprises an interface controller to receive a message, wherein at least a portion of the message is encrypted, a primary processor coupled to the interface controller and configured to process the received message, and a secondary secure processor coupled to the primary processor and to the interface controller. The secondary secure processor is configured to decrypt the portion of the message that is encrypted on behalf of the primary processor, analyze the decrypted portion of the message to determine whether the decrypted portion comprises information pertaining to sensitive data, and responsive to determining that the decrypted portion comprises information pertaining to sensitive data, process the information pertaining to the sensitive data and provide the sensitive data to the interface controller via a secure private bus not accessible by the primary processor.

公开(公告)号：US11567803B2

公开(公告)日：2023-01-31

申请号：US17084392

申请日：2020-10-29

Applicant: Rambus Inc.

Inventor： Christopher Haywood ,  Evan Lawrence Erickson

IPC: G06F12/00 ,  G06F9/50 ,  G06F9/451 ,  G06F12/02 ,  G06F12/1009 ,  G06F12/1072

Abstract: A memory allocation device for deployment within a host server computer includes control circuitry, a first interface to a local processing unit disposed within the host computer and local operating memory disposed within the host computer, and a second interface to a remote computer. The control circuitry allocates a first portion of the local memory to a first process executed by the local processing unit and transmits, to the remote computer via the second interface, a request to allocate to a second process executed by the local processing unit a first portion of a remote memory disposed within the remote computer. The control circuitry further receives instructions via the first interface to store data at a memory address within the first portion of the remote memory and transmits those instructions to the remote computer via the second interface.

公开(公告)号：US20200225993A1

公开(公告)日：2020-07-16

申请号：US16743271

申请日：2020-01-15

Applicant: Rambus Inc.

Inventor： Joseph James Tringali ,  Jianbing Chen ,  Evan Lawrence Erickson ,  Keith Lowrey

IPC: G06F9/50 ,  G06F9/54 ,  G06F11/30 ,  G06F12/02 ,  G06N20/00

Abstract: Described are self-learning systems and methods for adaptive management of memory resources within a memory hierarchy. Memory allocations associated with different active functions are organized into blocks for placement in alternative levels in a memory hierarchy optimized for different metrics of e.g. cost and performance. A host processor monitors a performance metric of the active functions, such as the number of instructions per clock cycle, and reorganizes the function-specific blocks among the levels of the hierarchy. Over time, this process tends toward block organizations that improve the performance metric.

公开(公告)号：US20150293018A1

公开(公告)日：2015-10-15

申请号：US14677878

申请日：2015-04-02

Applicant: RAMBUS INC.

Inventor： David Geoffrey Stork ,  Evan Lawrence Erickson ,  Patrick R. Gill ,  James Tringali

IPC: G01N21/45

CPC classification number: G01J1/0437 ,  G02B5/1871 ,  G02B27/0075 ,  G02B27/4205 ,  G02B2207/129 ,  H01L27/14625 ,  H04N5/2251

Abstract: A sensing device projects near-field spatial modulations onto a closely spaced photodetector array. Due to physical properties of the grating, the point-spread response distributes spatial modulations over a relatively large area on the array. The spatial modulations are captured by the array, and photographs and other image information can be extracted from the resultant data. An image-change detector incorporating such a sensing device uses very little power because only a small number of active pixels are required to cover a visual field.

Abstract translation: 感测装置将近场空间调制投影到紧密间隔的光电检测器阵列上。 由于光栅的物理性质，点扩散响应在阵列上相对较大的区域上分布空间调制。 空间调制由阵列捕获，照片和其他图像信息可从结果数据中提取出来。 包含这种感测装置的图像变换检测器使用非常小的功率，因为​​仅需要少量的有源像素来覆盖视野。