公开(公告)号：US20180359121A1

公开(公告)日：2018-12-13

申请号：US16000536

申请日：2018-06-05

申请人： SK hynix Inc. ,  Seoul National University R&DB Foundation

发明人： Hyeongjun KO ,  Mino KIM ,  Suhwan KIM ,  Deog-Kyoon JEONG

IPC分类号： H04L27/01 ,  H04L25/03 ,  H04L25/497 ,  H04L25/02

CPC分类号： H04L27/01 ,  H04L25/028 ,  H04L25/03343 ,  H04L25/497

摘要： A transmitter may include a driver having a PMOS transistor and an NMOS transistor connected in series between a first power supply and a second power supply. The driver may be configured to output an output signal. The transmitter may further include a driver control circuit configured to control a gate voltage of the PMOS transistor and a gate voltage of the NMOS transistor based on a level of a data signal, an occurrence of a level transition of the data signal, and a direction of the level transition of the data signal.

公开(公告)号：US20180226979A1

公开(公告)日：2018-08-09

申请号：US15701333

申请日：2017-09-11

申请人： SK hynix Inc. ,  Seoul National University R&DB FOUNDATION

发明人： Sungwoo KIM ,  Han-Gon KO ,  Suhwan KIM ,  Deog-Kyoon JEONG

IPC分类号： H03L7/091 ,  H03L7/089 ,  H03L7/18

CPC分类号： H03L7/091 ,  H03L7/0896 ,  H03L7/099 ,  H03L7/18

摘要： An injection locked phase locked loop includes an injection locked oscillator configured to generate an oscillation signal according to an injection signal and to generate a replica signal by replicating the oscillation signal when the injection signal is deactivated; a phase controller configured to generate a phase control signal according to a phase error signal; and an error detector configured to generate the phase error signal by comparing a phase of the oscillation signal and a phase of the replica signal, and to control a phase difference between the oscillation signal and the replica signal according to the phase control signal.

公开(公告)号：US20180062594A1

公开(公告)日：2018-03-01

申请号：US15584885

申请日：2017-05-02

申请人： SK hynix Inc. ,  Seoul National University R&DB FOUNDATION

发明人： Sungphil CHOI ,  Mino KIM ,  Suhwan KIM ,  Deog-Kyoon JEONG

IPC分类号： H03F3/45 ,  H03K17/16

CPC分类号： H03F3/45977 ,  H03F3/45197 ,  H03F3/45475 ,  H03F3/45748 ,  H03F3/45937 ,  H03F3/45973 ,  H03F2200/372 ,  H03F2203/45101 ,  H03F2203/45438 ,  H03F2203/45488 ,  H03K17/16

摘要： A receiver includes a signal receiving part suitable for outputting a signal corresponding to a reception signal that is received through an input terminal, and controlling a DC voltage of a signal to be outputted, according to an offset signal, an amplifying part suitable for amplifying and outputting an output of the signal receiving part, and a feedback control part suitable for controlling the offset signal according to an output of the amplifying part.

公开(公告)号：US20170338806A1

公开(公告)日：2017-11-23

申请号：US15590864

申请日：2017-05-09

申请人： SK Hynix Inc. ,  Seoul National University R&DB FOUNDATION

发明人： Joohyung CHAE ,  Hankyu CHI ,  Suhwan KIM ,  Deog-Kyoon JEONG

IPC分类号： H03K4/501 ,  H03K5/1534

CPC分类号： H03K4/501 ,  H03K5/1534

摘要： A triangular wave generator includes a wave generator configured to generate a triangular wave according to a clock signal and a control signal. The triangular wave generator further includes a wave controller configured to adjust a value of the control signal in a correction mode. The control signal includes a first bias control signal, a second bias control signal, and a capacitance control signal.

公开(公告)号：US20210258194A1

公开(公告)日：2021-08-19

申请号：US17174960

申请日：2021-02-12

申请人： SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION

发明人： Deog-Kyoon JEONG ,  KwangHoon LEE ,  Jung Hun PARK ,  Han-Gon KO ,  Soyeong SHIN

IPC分类号： H04L25/03 ,  H04L27/01

摘要： Provided is a transmitter performing at least feed-forward equalizing and crosstalk cancellation, the transmitter including: a main driver (20) generating waveform including data to be transmitted; and an FFE driver block (40) connected to the main driver in parallel, and generating waveform that is acquired by applying a sum of amplitude for feed-forward equalizing and amplitude for crosstalk cancellation, so as to adjust the waveform generated by the main driver.

公开(公告)号：US20140140385A1

公开(公告)日：2014-05-22

申请号：US14080756

申请日：2013-11-14

申请人： SNU R&DB FOUNDATION ,  SK HYNIX INC.

发明人： Seok-Min YE ,  Deog-Kyoon JEONG

IPC分类号： H04L27/01

CPC分类号： H04L27/01 ,  H04L25/03038 ,  H04L25/03057 ,  H04L25/03267 ,  H04L25/03885 ,  H04L25/03949 ,  H04L2025/0349

摘要： An equalizer includes a sampler configured to sample an edge and data of an input signal or an induced signal obtained from the input signal, a clock generator configured to generate an edge clock used to decide sampling timing of the edge and a data clock used to decide sampling timing of the data based on the sampled edge and the sampled data, and a controller configured to control the sampling timing of the edge and the sampling timing of the data based on the sampled edge and the sampled data.

摘要翻译： 均衡器包括：采样器，被配置为对从输入信号获得的输入信号或感应信号的边沿和数据进行采样;时钟发生器，被配置为生成用于决定边缘的采样定时的边沿时钟，以及用于决定边缘的数据时钟 基于采样的边缘和采样数据对数据的采样定时;以及控制器，被配置为基于采样的边缘和采样数据来控制边缘的采样定时和数据的采样定时。