公开(公告)号：US20230299089A1

公开(公告)日：2023-09-21

申请号：US18324949

申请日：2023-05-26

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yeon Keon MOON ,  Tae Sang KIM ,  Joon Seok PARK ,  Myoung Hwa KIM ,  Hyung Jun KIM ,  Sang Woo SOHN ,  Hye Lim CHOI

IPC: H01L27/12

CPC classification number: H01L27/1237 ,  H01L27/1255 ,  H01L27/1259 ,  H01L27/124 ,  H01L27/1225

Abstract: A display device includes: a substrate; a first active layer of a first transistor and a second active layer of a second transistor on the substrate; a first gate insulating layer on the first active layer; a first gate electrode on the first gate insulating layer; a second gate insulating layer on the second active layer; and a second gate electrode on the second gate insulating layer, wherein a hydrogen concentration of the first gate insulating layer is lower than a hydrogen concentration of the second gate insulating layer.

公开(公告)号：US20210327910A1

公开(公告)日：2021-10-21

申请号：US17157184

申请日：2021-01-25

Applicant: Samsung Display Co., LTD.

Inventor： Joon Seok PARK ,  So Young KOO ,  Eok Su KIM ,  Hyung Jun KIM ,  Sang Woo SOHN ,  Jun Hyung LIM ,  Kyung Jin JEON

IPC: H01L27/12

Abstract: A display device may include a first gate electrode disposed on a substrate, a buffer layer disposed on the first gate electrode, a first active pattern on the buffer layer, the first active pattern overlapping the first gate electrode and including an oxide semiconductor, a second active pattern on the buffer layer, spaced apart from the first active pattern, and including an oxide semiconductor, the second active pattern including a channel region, and a source region and a drain region, a source pattern and a drain pattern respectively at ends of the first active pattern, a first insulation pattern disposed on the first active pattern, a second insulation pattern disposed on the channel region, a first oxygen supply pattern on the first insulation pattern, a second oxygen supply pattern on the second insulation pattern, and a second gate electrode on the second oxygen supply pattern.

公开(公告)号：US20210111197A1

公开(公告)日：2021-04-15

申请号：US16906948

申请日：2020-06-19

Applicant: Samsung Display Co., Ltd.

Inventor： Yeon Keon MOON ,  Tae Sang KIM ,  Joon Seok PARK ,  Myoung Hwa KIM ,  Hyung Jun KIM ,  Sang Woo SOHN ,  Hye Lim CHOI

IPC: H01L27/12

Abstract: A display device includes: a substrate; a first active layer of a first transistor and a second active layer of a second transistor on the substrate; a first gate insulating layer on the first active layer; a first gate electrode on the first gate insulating layer; a second gate insulating layer on the second active layer; and a second gate electrode on the second gate insulating layer, wherein a hydrogen concentration of the first gate insulating layer is lower than a hydrogen concentration of the second gate insulating layer.

公开(公告)号：US20200343275A1

公开(公告)日：2020-10-29

申请号：US16818310

申请日：2020-03-13

Applicant: Samsung Display Co., LTD.

Inventor： Geun Chul PARK ,  Joon Seok PARK ,  Tae Sang KIM ,  Yeon Keon MOON ,  Jun Hyung LIM ,  Kyung Jin JEON

IPC: H01L27/12

Abstract: A display device and a method of manufacturing the same. The display device includes a pixel connected to a scan line and a data line intersecting the scan line, and a driving transistor and a switching transistor disposed in the pixel. The driving transistor includes a substrate, a first active layer disposed on the substrate, a first gate electrode disposed on the first active layer, and a second insulating film contacting the first gate electrode and the first gate electrode. The switching transistor includes a second active layer disposed on the substrate, a second gate electrode disposed on the second active layer, a first insulating film contacting the second active layer and the second gate electrode, and a second insulating film covering the first insulating film. The first insulating film and the second insulating film are made of different materials from each other.

公开(公告)号：US20200161477A1

公开(公告)日：2020-05-21

申请号：US16752126

申请日：2020-01-24

Applicant: Samsung Display Co., Ltd.

Inventor： Ji Hun LIM ,  Joon Seok PARK ,  Jay Bum KIM ,  Jun Hyung LIM ,  Kyoung Seok SON

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/423 ,  H01L29/66

Abstract: A transistor may include a semiconductor, a source electrode, a drain electrode, and a gate electrode. The semiconductor may include a first doped region, a second doped region, a source region, a drain region, and a channel region. The channel region is positioned between the source region and the drain region. The first doped region is positioned between the channel region and the source region. The second doped region is positioned between the channel region and the drain region. A doping concentration of the first doped region is lower than a doping concentration of the source region. A doping concentration of the second doped region is lower than a doping concentration of the drain region. The source electrode is electrically connected to the source region. The drain electrode is electrically connected to the drain region. The gate electrode overlaps the channel region.

公开(公告)号：US20200098924A1

公开(公告)日：2020-03-26

申请号：US16563699

申请日：2019-09-06

Applicant: Samsung Display Co., Ltd.

Inventor： Tae Sang KIM ,  Joon Seok PARK ,  Kwang Suk KIM ,  Yeon Keon MOON ,  Geunchul PARK ,  Jun Hyung LIM ,  Kyung Jin JEON

IPC: H01L29/786 ,  H01L27/12 ,  H01L21/467 ,  H01L29/66

Abstract: A transistor substrate may include: a substrate; an active pattern formed on the substrate, the active pattern including an oxide semiconductor that contains tin (Sn), and the active pattern including a source region, a drain region, and a channel region that is formed between the source region and the drain region; a source protective pattern formed on the source region; a drain protective pattern formed on the drain region; a gate electrode overlapping at least a portion of the channel region; an insulation interlayer covering the source protective pattern and the drain protective pattern; a source electrode formed on the insulation interlayer, the source electrode being in contact with the source protective pattern through a source contact hole that is formed in the insulation interlayer; and a drain electrode formed on the insulation interlayer, the drain electrode being in contact with the drain protective pattern through a drain contact hole that is formed in the insulation interlayer.

公开(公告)号：US20180069132A1

公开(公告)日：2018-03-08

申请号：US15691207

申请日：2017-08-30

Applicant: Samsung Display Co., Ltd.

Inventor： Ji Hun LIM ,  Joon Seok PARK ,  Jay Bum KIM ,  Jun Hyung LIM ,  Kyoung Seok SON

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L29/78648 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78621 ,  H01L29/78633 ,  H01L29/7869 ,  H01L2029/42388

Abstract: A transistor may include a semiconductor, a source electrode, a drain electrode, and a gate electrode. The semiconductor may include a first doped region, a second doped region, a source region, a drain region, and a channel region. The channel region is positioned between the source region and the drain region. The first doped region is positioned between the channel region and the source region. The second doped region is positioned between the channel region and the drain region. A doping concentration of the first doped region is lower than a doping concentration of the source region. A doping concentration of the second doped region is lower than a doping concentration of the drain region. The source electrode is electrically connected to the source region. The drain electrode is electrically connected to the drain region. The gate electrode overlaps the channel region.

公开(公告)号：US20160329432A1

公开(公告)日：2016-11-10

申请号：US14931172

申请日：2015-11-03

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Joon Seok PARK ,  Bosung KIM ,  Changjung KIM

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L29/78648 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/78663 ,  H01L29/78681 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor includes: a lower gate electrode on a substrate; a gate insulating layer on the lower gate electrode; a first semiconductor layer on the gate insulating layer; a source electrode on the first semiconductor layer, a drain electrode on the first semiconductor layer and spaced apart form the source electrode; a second semiconductor layer on a channel region of the first semiconductor layer and on the source electrode and the drain electrode; a passivation layer on the second semiconductor layer; and an upper gate electrode disposed on the passivation layer, corresponding to the channel region.

Abstract translation: 薄膜晶体管包括：在基板上的下栅电极; 下栅电极上的栅极绝缘层; 栅极绝缘层上的第一半导体层; 在所述第一半导体层上的源极，在所述第一半导体层上的漏电极，并且与所述源极间隔开; 在所述第一半导体层的沟道区上以及所述源电极和所述漏电极上的第二半导体层; 第二半导体层上的钝化层; 以及对应于沟道区域设置在钝化层上的上栅电极。