COMPUTING DEVICE AND METHOD USING MULTIPLIER-ACCUMULATOR

    公开(公告)号:US20230075348A1

    公开(公告)日:2023-03-09

    申请号:US17735492

    申请日:2022-05-03

    Abstract: A multiplier-accumulator includes: a plurality of exclusive negative OR (XNOR) gates provided along one or more input lines and configured to receive signals corresponding to an input bit sequence and a weight bit sequence corresponding to each of the one or more input lines and to output partial product results between the input bit sequence and the weight bit sequence; an encoder configured to apply, to the plurality of XNOR gates, a signal corresponding to a sequence in which a logical value of a most significant bit (MSB) is converted from an original sequence expressed in 2's complement of a corresponding sequence for either one or both of the input bit sequence and the weight bit sequence; and an outputter configured to generate an output in which a correction value is applied to operation results in which the partial product results output from the plurality of XNOR gates are summed.

    DEVICE AND METHOD WITH MULTI-BIT OPERATION

    公开(公告)号:US20220326910A1

    公开(公告)日:2022-10-13

    申请号:US17473139

    申请日:2021-09-13

    Abstract: A multi-bit cell includes: a memory storing a weight resistance corresponding to a multi-bit weight; a current source configured to apply a current to the memory to generate a weight voltage from the weight resistance; a plurality of multiplexers connected to each other in parallel and connected to the memory in series, each of the multiplexers being configured to output one signal of the weight voltage and a first fixed voltage based on a multi-bit input; and a plurality of capacitors connected to the plurality of multiplexers, respectively, each of the capacitors being configured to store a respective weight capacitance, and to generate charge data by performing an operation on the outputted signal and the weight capacitance.

    NEURAL NETWORK APPARATUS
    33.
    发明申请

    公开(公告)号:US20220114427A1

    公开(公告)日:2022-04-14

    申请号:US17238403

    申请日:2021-04-23

    Abstract: A neural network apparatus includes: a plurality of memory cells each comprising a variable resistance element and a first transistor; a plurality of bit lines extending in a first direction; and a plurality of word lines extending in a second direction, crossing the bit lines and respectively connected to the first transistor of the plurality of memory cells; a plurality of sub-column circuits each comprising memory cells of the memory cells connected in parallel along the first direction; and a column circuit comprising two or more of the sub-column circuits connected in series along the second direction, wherein, when a neural network operation is performed, the column circuit outputs a summation current to a bit line connected to the column circuit based on voltage applied to the plurality of word lines.

    DEVICE AND METHOD FOR RECEIVING POWER WIRELESSLY

    公开(公告)号:US20210242717A1

    公开(公告)日:2021-08-05

    申请号:US17071122

    申请日:2020-10-15

    Abstract: A wireless power receiver and a wireless power reception method are disclosed. The wireless power receiver includes a charging element, a receiving coil configured to wirelessly receive power from a wireless power transmitter, a rectifier configured to convert an alternating current (AC) voltage generated from the receiving coil to a direct current (DC) voltage, and to output the DC voltage, a voltage converter configured to generate a charging current to charge the charging element, based on the DC voltage output from the rectifier, a current measurer configured to measure the charging current transferred to the charging element, and a controller configured to control a level of the charging current generated from the voltage converter based on a result of the measuring.

Patent Agency Ranking