摘要:
A condition is detected to cause a component having physical layer circuitry with a transmitter and a receiver to enter a testing state. The transmitter transmits a pre-selected data pattern while comparing data received by the receiver to the pre-selected data pattern during a first phase of the testing state. The transmitter transmits data received by the receiver without comparing the data received by the receiver to the pre-selected data pattern during a second phase of the testing state.
摘要:
An electrical connector to be electrically disposed between a first circuit board and a second circuit board to electrically couple the first circuit board with the second circuit board is disclosed. The electrical connector may have an electro-optic modulator to modulate optical signals based on electrical signals exchanged between the first and second circuit boards through the electrical connector. Systems incorporating such electrical connectors, and methods of using the electrical connectors and systems, such as for debug, are also disclosed.
摘要:
According to some embodiments an apparatus comprising a vote generator, a vote governor, and a local clock controller is provided. The vote generator generates votes based on a local clock signal and transitions in a stream of received data. The vote governor receives the generated votes and discards at least some of the votes. The local clock controller adjusts the local clock signal based on a generated vote that has not been discarded.
摘要:
Frequency multiplying delay-locked loop techniques are described in which a plurality of phase shifted signals are generated which have increased frequency relative to the incoming signal.
摘要:
A method and apparatus, in some embodiments the apparatus includes a flex cable terminating at a first end and a second end and having a plurality of conductors therein, and a repeater circuit disposed between the first end and the second end and connected to at least one of the plurality of conductors to re-transmit a signal transmitted on the at least one of the plurality of conductors.
摘要:
Disclosed are embodiments of a method, apparatus and system for a low power state for a point-to-point link. During the low power state, the signal on both conductors of a differential transmit pair are driven to electrical idle. Analog activity detectors are enabled during the low power state and are disabled during normal power state. Exit from the low power state does not require a physical layer re-initialization sequence. Other embodiments are also described and claimed.
摘要:
A method for performing analysis of electrical signals in a system is disclosed. The system includes at least two circuit elements between which an electrical signal is transmitted. The method converts the electrical signal to dual optical signals, one of which is converted back to an electrical signal for receipt by the intended circuit element. The second optical signal may be transmitted a great distance, relative to electrical signals, allowing for remote analysis of the signal. The loss in converting the electrical signal to an optical signal, then back to an electrical signal is low compared to other debug methods. The method may be performed with high-speed signals.
摘要:
A method and apparatus for retraining skew compensation in an interface is presented. In one embodiment, a retraining interval is determined, and counters in the transmitting agent and receiving agent count up until the retraining interval is reached. A tracking unit used to select one of several interpolated clocks may then be powered up, and a special retraining phit may be sent across the interface. During the retraining process, the transfer of flits into and out of the flow-control mechanism may be inhibited. When the retraining process is finished, the tracking unit may be powered down.
摘要:
A software self test engine is executed from a cache of a processor. The software self test engine is executed using an execution engine of the processor to perform a physical layer self test. The physical layer self test is performed by transmitting a test vector from the execution engine under control of the self test engine to an input/output (“I/O”) unit of the processor along a datapath coupling the execution engine to the I/O unit. The test vector is transmitted along a loop back path including the I/O unit and the datapath to test a hardware device along the loop back path.