公开(公告)号：US4970384A

公开(公告)日：1990-11-13

申请号：US391246

申请日：1989-08-09

申请人： Yoshiaki Kambe ,  Yoshihiko Okuda ,  Atsuyuki Hirono ,  Akira Nagaoka ,  Takayasu Ito

发明人： Yoshiaki Kambe ,  Yoshihiko Okuda ,  Atsuyuki Hirono ,  Akira Nagaoka ,  Takayasu Ito

IPC分类号： G01D5/34 ,  G01S7/481 ,  G01S17/46

CPC分类号： G01S7/4813 ,  G01D5/34 ,  G01S17/46

摘要： An optical sensor discriminating the presence of an object or detecting distance to an object which includes a light projecting element for projecting light to a detection area, a light receiving element for receiving light reflected from an object present in the detection area and an anamorphic light receiving lens for expanding a condensed light spot received on the light receiving element in a direction perpendicular to a direction of movement of the light spot on the light receiving element. The light receiving element outputs a detection signal which discriminates the presence of the object in the detection area. The light receiving element can be rectangular in shape and comprise two or more triangular shaped photodiodes which output detection signals that can be processed to determine a distance between the object and the light receiving element. A movable prism can also be provided to compensate for movement of the object other than towards or away from the light receiving element to avoid erroneous distance measurement which might otherwise occur.

公开(公告)号：US20120113552A1

公开(公告)日：2012-05-10

申请号：US13354183

申请日：2012-01-19

申请人： Takayasu Ito ,  Mitsuru Hiraki ,  Koichi Ashiga

发明人： Takayasu Ito ,  Mitsuru Hiraki ,  Koichi Ashiga

IPC分类号： H02H3/20

CPC分类号： H01L23/50 ,  H01L23/60 ,  H01L24/06 ,  H01L27/0207 ,  H01L27/0266 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2924/01029 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H02M3/00 ,  H02M3/07 ,  H02M3/157 ,  H01L2924/00

摘要： An integrated circuit formed on a semiconductor chip includes voltage regulators for stepping down an externally-supplied power voltage to produce an internal power voltage, and internal circuits which operate based on the internal power voltage. The voltage regulators are laid in the area of the buffers and protective elements for the input/output signals and power voltages so that the overhead area due to the on-chip provision of the voltage regulators is minimized. The internal power voltage is distributed to the internal circuits through a looped main power line, with an electrode pad for connecting an external capacitor for stabilizing the internal power voltage being provided on it, so that the internal power voltage is stabilized and the power consumption of the integrated circuit is minimized.

摘要翻译： 形成在半导体芯片上的集成电路包括用于降低外部提供的电源电压以产生内部电源电压的电压调节器，以及基于内部电源电压工作的内部电路。 电压调节器被放置在缓冲器和保护元件的区域中用于输入/输出信号和电源电压，使得由于电压调节器的片上提供而导致的开销面积被最小化。 内部电源电压通过环形主电源线分配到内部电路，电极焊盘用于连接外部电容器，用于稳定其上提供的内部电源电压，从而内部电源电压稳定，功耗 集成电路最小化。

公开(公告)号：US08139327B2

公开(公告)日：2012-03-20

申请号：US12977624

申请日：2010-12-23

申请人： Takayasu Ito ,  Mitsuru Hiraki ,  Koichi Ashiga

发明人： Takayasu Ito ,  Mitsuru Hiraki ,  Koichi Ashiga

IPC分类号： H02H9/00

CPC分类号： H01L23/50 ,  H01L23/60 ,  H01L24/06 ,  H01L27/0207 ,  H01L27/0266 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2924/01029 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H02M3/00 ,  H02M3/07 ,  H02M3/157 ,  H01L2924/00

摘要： An integrated circuit formed on a semiconductor chip includes voltage regulators for stepping down an externally-supplied power voltage to produce an internal power voltage, and internal circuits which operate based on the internal power voltage. The voltage regulators are laid in the area of the buffers and protective elements for the input/output signals and power voltages so that the overhead area due to the on-chip provision of the voltage regulators is minimized. The internal power voltage is distributed to the internal circuits through a looped main power line, with an electrode pad for connecting an external capacitor for stabilizing the internal power voltage being provided on it, so that the internal power voltage is stabilized and the power consumption of the integrated circuit is minimized.

摘要翻译： 形成在半导体芯片上的集成电路包括用于降低外部提供的电源电压以产生内部电源电压的电压调节器，以及基于内部电源电压工作的内部电路。 电压调节器被放置在缓冲器和保护元件的区域中用于输入/输出信号和电源电压，使得由于电压调节器的片上提供而导致的开销面积被最小化。 内部电源电压通过环形主电源线分配到内部电路，电极焊盘用于连接外部电容器，用于稳定其上提供的内部电源电压，从而内部电源电压稳定，功耗 集成电路最小化。

公开(公告)号：US07872520B2

公开(公告)日：2011-01-18

申请号：US12475867

申请日：2009-06-01

申请人： Naoya Arisaka ,  Takayasu Ito

发明人： Naoya Arisaka ,  Takayasu Ito

IPC分类号： G05F1/10

CPC分类号： H01L27/0207 ,  G11C16/30 ,  H01L23/4824 ,  H01L27/0218 ,  H01L27/11526 ,  H01L27/11573 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/0002 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor integrated circuit device which substantially reduces drop in a supply voltage generated by a regulator and ensures stable supply of a supply voltage with high efficiency and high accuracy. In the device, a memory power supply includes a plurality of transistors and an error amplifier. In the transistors, source pads and drain pads are alternately arranged in a row along one edge of a semiconductor chip in a peripheral area of the chip. Transistor gates are formed in parallel with the alternately arranged source pads and drain pads (so that the longitudinal direction of the gates is parallel to the direction of the arrangement of the source pads and drain pads). Consequently, the length of wirings coupled to drains and sources is shortened and the sheet resistance is decreased.

摘要翻译： 一种半导体集成电路器件，其基本上减小了由调节器产生的电源电压的下降，并确保以高效率和高精度稳定地供应电源电压。 在该装置中，存储器电源包括多个晶体管和误差放大器。 在晶体管中，源极焊盘和漏极焊盘沿芯片的外围区域中的半导体芯片的一个边缘交替布置成一行。 晶体管栅极与交替布置的源极焊盘和漏极焊盘平行地形成（使得栅极的纵向方向平行于源极焊盘和漏极焊盘的布置方向）。 因此，连接到排水沟和源的布线长度缩短，薄层电阻降低。

公开(公告)号：USRE41270E1

公开(公告)日：2010-04-27

申请号：US11646618

申请日：2006-12-28

申请人： Mitsuru Hiraki ,  Takayasu Ito

发明人： Mitsuru Hiraki ,  Takayasu Ito

IPC分类号： G05F1/59

CPC分类号： H02M3/155 ,  G06F1/26 ,  G06F1/32 ,  H02M2001/0032 ,  H02M2001/0045 ,  Y02B70/16 ,  Y10T307/696

摘要： For an internal circuit having a first operation mode consuming a first operational current and a second operation mode consuming a second operational current, which is smaller than the first operational current, a first power source regulator for stepping down a predefined output power supply voltage from an input power supply voltage and having a current supply ability corresponding to the first operational current of the internal circuit and a second power source gulator having a current supply ability corresponding to the second operational current are combined in order to, under the control of a power supply control unit, operate the first step-down type regulator in response to a first control signal instructing the first operation mode in the internal circuit and to operate the second step-down type regulator in response to a second control signal instructing the second operation mode. In this case, the internal circuit and power supply control unit are provided in one semiconductor integrated circuit device so that reduced power consumption and power supply switching in accordance with the operation mode can be achieved.

摘要翻译： 对于具有消耗第一操作电流的第一操作模式和消耗小于第一工作电流的第二工作电流的第二操作模式的内部电路，用于从第一操作电流降低预定义的输出电源电压的第一电源调节器 输入电源电压并具有与内部电路的第一工作电流相对应的电流供应能力和具有与第二工作电流相对应的电流供应能力的第二电源模拟器，以便在电源的控制下 控制单元，响应于指示内部电路中的第一操作模式的第一控制信号操作第一降压型稳压器，并且响应于指示第二操作模式的第二控制信号来操作第二降压型稳压器。 在这种情况下，内部电路和电源控制单元设置在一个半导体集成电路装置中，从而可以实现根据操作模式的降低的功耗和电源切换。

公开(公告)号：US20100045368A1

公开(公告)日：2010-02-25

申请号：US12606715

申请日：2009-10-27

申请人： Takayasu Ito ,  Mitsuru Hiraki ,  Koichi Ashiga

发明人： Takayasu Ito ,  Mitsuru Hiraki ,  Koichi Ashiga

IPC分类号： G05F1/10

CPC分类号： H01L23/50 ,  H01L23/60 ,  H01L24/06 ,  H01L27/0207 ,  H01L27/0266 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2924/01029 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H02M3/00 ,  H02M3/07 ,  H02M3/157 ,  H01L2924/00

摘要： An integrated circuit formed on a semiconductor chip includes voltage regulators for stepping down an externally-supplied power voltage to produce an internal power voltage, and internal circuits which operate based on the internal power voltage. The voltage regulators are laid in the area of the buffers and protective elements for the input/output signals and power voltages so that the overhead area due to the on-chip provision of the voltage regulators is minimized. The internal power voltage is distributed to the internal circuits through a looped main power line, with an electrode pad for connecting an external capacitor for stabilizing the internal power voltage being provided on it, so that the internal power voltage is stabilized and the power consumption of the integrated circuit is minimized.

摘要翻译： 形成在半导体芯片上的集成电路包括用于降低外部提供的电源电压以产生内部电源电压的电压调节器，以及基于内部电源电压工作的内部电路。 电压调节器被放置在缓冲器和保护元件的区域中用于输入/输出信号和电源电压，使得由于电压调节器的片上提供而导致的开销面积被最小化。 内部电源电压通过环形主电源线分配到内部电路，电极焊盘用于连接外部电容器，用于稳定其上提供的内部电源电压，从而内部电源电压稳定，功耗 集成电路最小化。

公开(公告)号：US07177123B2

公开(公告)日：2007-02-13

申请号：US10692693

申请日：2003-10-27

申请人： Takayasu Ito ,  Mitsuru Hiraki ,  Koichi Ashiga

发明人： Takayasu Ito ,  Mitsuru Hiraki ,  Koichi Ashiga

IPC分类号： H02H9/00

CPC分类号： H01L23/50 ,  H01L23/60 ,  H01L24/06 ,  H01L27/0207 ,  H01L27/0266 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2924/01029 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H02M3/00 ,  H02M3/07 ,  H02M3/157 ,  H01L2924/00

摘要： An integrated circuit formed on a semiconductor chip includes voltage regulators for stepping down an externally-supplied power voltage to produce an internal power voltage, and internal circuits which operate based on the internal power voltage. The voltage regulators are laid in the area of the buffers and protective elements for the input/output signals and power voltages so that the overhead area due to the on-chip provision of the voltage regulators is minimized. The internal power voltage is distributed to the internal circuits through a looped main power line, with an electrode pad for connecting an external capacitor for stabilizing the internal power voltage being provided on it, so that the internal power voltage is stabilized and the power consumption of the integrated circuit is minimized.

摘要翻译： 形成在半导体芯片上的集成电路包括用于降低外部提供的电源电压以产生内部电源电压的电压调节器，以及基于内部电源电压工作的内部电路。 电压调节器被放置在缓冲器和保护元件的区域中用于输入/输出信号和电源电压，使得由于电压调节器的片上提供而导致的开销面积被最小化。 内部电源电压通过环形主电源线分配到内部电路，电极焊盘用于连接外部电容器，用于稳定其上提供的内部电源电压，从而内部电源电压稳定，功耗 集成电路最小化。

公开(公告)号：US06737839B2

公开(公告)日：2004-05-18

申请号：US10170630

申请日：2002-06-14

申请人： Mitsuru Hiraki ,  Takayasu Ito

发明人： Mitsuru Hiraki ,  Takayasu Ito

IPC分类号： G05F159

CPC分类号： H02M3/155 ,  G06F1/26 ,  G06F1/32 ,  H02M2001/0032 ,  H02M2001/0045 ,  Y02B70/16 ,  Y10T307/696

摘要： For an internal circuit having a first operation mode consuming a first operational current and a second operation mode consuming a second operational current, which is smaller than the first operational current, a first power source regulator for stepping down a predefined output power supply voltage from an input power supply voltage and having a current supply ability corresponding to the first operational current of the internal circuit and a second power source gulator having a current supply ability corresponding to the second operational current are combined in order to, under the control of a power supply control unit, operate the first step-down type regulator in response to a first control signal instructing the first operation mode in the internal circuit and to operate the second step-down type regulator in response to a second control signal instructing the second operation mode. In this case, the internal circuit and power supply control unit are provided in one semiconductor integrated circuit device so that reduced power consumption and power supply switching in accordance with the operation mode can be achieved.

摘要翻译： 对于具有消耗第一操作电流的第一操作模式和消耗小于第一工作电流的第二工作电流的第二操作模式的内部电路，用于从第一操作电流降低预定义的输出电源电压的第一电源调节器 输入电源电压并具有与内部电路的第一工作电流相对应的电流供应能力和具有与第二工作电流相对应的电流供应能力的第二电源模拟器，以便在电源的控制下 控制单元，响应于指示内部电路中的第一操作模式的第一控制信号操作第一降压型稳压器，并且响应于指示第二操作模式的第二控制信号来操作第二降压型稳压器。 在这种情况下，内部电路和电源控制单元设置在一个半导体集成电路装置中，从而可以实现根据操作模式的降低的功耗和电源切换。

公开(公告)号：US5608211A

公开(公告)日：1997-03-04

申请号：US361374

申请日：1994-12-22

申请人： Atsuyuki Hirono ,  Takayasu Ito ,  Takeshi Hashimoto

发明人： Atsuyuki Hirono ,  Takayasu Ito ,  Takeshi Hashimoto

IPC分类号： G01B11/00 ,  G01B11/03 ,  G01B11/24 ,  G01C3/06 ,  H04N1/22

CPC分类号： G01B11/24

摘要： In an optically scanning displacement detector for determination of an object's profile, the detector comprises a light projecting unit for radiating a light beam on the object, a light receiving unit for receiving a reflected light beam from the object to output an object position signal, and a distance determining unit for determining a distance between the projecting unit and the object in accordance with the object position signal. The light projecting and receiving units are mounted in a carrier which is movably supported to a frame. The carrier can be moved in a scanning direction to scan the light beam across the object by the use of an electric motor such as a voice-coil linear motor. Since the present detector does not use a scanning mirror for deviating the light beam, the object's profile can be determined with improved accuracy of measurement, while preventing a formation of dead space in which the light beam can not be radiated during the scanning operation. The detector also comprises a carrier position sensor for determining a position of the carrier in the scanning direction, and a safeguard unit for sensing unusual operation of the motor to generate a stop signal, and stopping a supply of electric current to the motor in response to the stop signal.

摘要翻译： 在用于确定物体轮廓的光学扫描位移检测器中，检测器包括用于将光束照射在物体上的光投射单元，用于接收来自物体的反射光束以输出物体位置信号的光接收单元，以及 距离确定单元，用于根据对象位置信号确定投影单元和物体之间的距离。 光投射和接收单元安装在可移动地支撑在框架上的载体中。 载体可以沿扫描方向移动，以通过使用诸如音圈线性电动机的电动机扫描横跨物体的光束。 由于本检测器不使用用于偏离光束的扫描镜，因此能够以提高的测量精度确定物体的轮廓，同时防止在扫描操作期间形成光束不能被辐射的死空间。 检测器还包括用于确定载体在扫描方向上的位置的载体位置传感器，以及用于检测马达的异常操作以产生停止信号的保护单元，并且响应于 停止信号。

公开(公告)号：US4873582A

公开(公告)日：1989-10-10

申请号：US210167

申请日：1988-06-21

申请人： Takashi Furuhata ,  Hitoaki Owashi ,  Takayasu Ito ,  Masakazu Hamaguchi

发明人： Takashi Furuhata ,  Hitoaki Owashi ,  Takayasu Ito ,  Masakazu Hamaguchi

IPC分类号： H04N5/92 ,  H04N9/797 ,  H04N9/81 ,  H04N9/82

CPC分类号： H04N9/82 ,  H04N9/7973 ,  H04N9/81

摘要： Disclosed is a magnetic recording-playback apparatus suitable for recording and reproducing a signal including a broad-band composite video signal and a method therefor. The broad-band signal is time-sliced into signals in two channels, and each divided signal is expanded on the time axis so that it is converted into a lower-band signal before being recorded on a magnetic tape. In the time axis expansion process, the vertical blanking signal and/or horizontal blanking signal is not expanded, whereby the divided video signals have a still lower frequency band.

摘要翻译： 公开了适用于记录和再现包括宽带复合视频信号的信号的磁记录重放装置及其方法。 宽带信号在两个信道中被时分片分成信号，并且每个分频信号在时间轴上被扩展，使得它在被记录在磁带上之前被转换成低频带信号。 在时间轴扩展处理中，不扩展垂直消隐信号和/或水平消隐信号，从而分割的视频信号具有更低的频带。