Abstract:
An integrated fluxgate device, which includes a magnetic core, an excitation coil, and a sense coil. The magnetic core has a longitudinal edge and a terminal edge. The excitation coil coils around the longitudinal edge of the magnetic core, and the excitation coil has a first number of excitation coil members within a proximity of the terminal edge. The sense coil coils around the longitudinal edge of the magnetic core, and the sense coil has a second number of sense coil members within the proximity of the terminal edge. For reducing fluxgate noise, the second number of sense coil members may be less than the first number of excitation coil members within the proximity of the terminal edge.
Abstract:
A method of magnetic forming an integrated fluxgate sensor includes providing a patterned magnetic core on a first nonmagnetic metal or metal alloy layer on a dielectric layer over a first metal layer that is on or in an interlevel dielectric layer (ILD) which is on a substrate. A second nonmagnetic metal or metal alloy layer is deposited including over and on sidewalls of the magnetic core. The second nonmagnetic metal or metal alloy layer is patterned, where after patterning the second nonmagnetic metal or metal alloy layer together with the first nonmagnetic metal or metal alloy layer encapsulates the magnetic core to form an encapsulated magnetic core. After patterning, the encapsulated magnetic core is magnetic field annealed using an applied magnetic field having a magnetic field strength of at least 0.1 T at a temperature of at least 150° C.
Abstract:
Disclosed examples provide wafer-level integration of magnetoresistive sensors and Hall-effect sensors in a single integrated circuit, in which one or more vertical and/or horizontal Hall sensors are formed on or in a substrate along with transistors and other circuitry, and a magnetoresistive sensor circuit is formed in the IC metallization structure.
Abstract:
An integrated fluxgate device, which includes a magnetic core, an excitation coil, and a sense coil. The magnetic core has a longitudinal edge and a terminal edge. The excitation coil coils around the longitudinal edge of the magnetic core, and the excitation coil has a first number of excitation coil members within a proximity of the terminal edge. The sense coil coils around the longitudinal edge of the magnetic core, and the sense coil has a second number of sense coil members within the proximity of the terminal edge. For reducing fluxgate noise, the second number of sense coil members may be less than the first number of excitation coil members within the proximity of the terminal edge.
Abstract:
A fluxgate device that includes a first magnetic core and a second magnetic core. The first magnetic core has a first magnetized direction that deviates from a first sense direction by more than 0 degree and less than 90 degrees. The second magnetic core is arranged orthogonally to the first magnetic core. The second magnetic core has a second magnetized direction that deviates from a second sense direction by more than 0 degree and less than 90 degrees.
Abstract:
A method of fabricating fluxgate devices to measure the magnetic field in two orthogonal, in plane directions, by using a composite-anisotropic magnetic core structure.
Abstract:
A method of fabricating fluxgate devices to measure the magnetic field in two orthogonal, in plane directions, by using a composite-anisotropic magnetic core structure.
Abstract:
A method of fabricating fluxgate devices to measure the magnetic field in two orthogonal, in plane directions, by using a composite-anisotropic magnetic core structure.
Abstract:
In one example, a device comprises a lead frame, a semiconductor die, a spacer, and a magnetic concentrator. The lead frame comprises a conductor. The spacer is between the semiconductor die and the conductor. The magnetic concentrator overlaps at least partially with the conductor.
Abstract:
Apparatus, and their methods of manufacture, including an integrated circuit device having metallization layers for interconnecting underlying electronic devices. Contacts contact conductors of an uppermost one of the metallization layers. A planarized first dielectric layer covers the contacts and the uppermost one of the metallization layers. An anisotropic magnetoresistive (AMR) stack is on the first dielectric layer between vertically aligned portions of an etch stop layer formed on the first dielectric layer and a second dielectric layer formed on the etch stop layer. Vias extend through the first dielectric layer to electrically connect the AMR stack and the contacts. A chemical-mechanical planarization (CMP) stop layer is on the AMR stack. A third dielectric layer is on the CMP stop layer. A passivation layer contacts the second dielectric layer portions, the third dielectric layer, and each opposing end of the AMR stack and the CMP stop layer.