公开(公告)号：US20170117356A1

公开(公告)日：2017-04-27

申请号：US14924584

申请日：2015-10-27

Applicant: Texas Instruments Incorporated

Inventor： Dan Carothers ,  Ricky Jackson ,  Rajarshi Mukhopadhyay ,  Ben Cook

IPC: H01L29/06 ,  H01L23/522 ,  H01L21/762

CPC classification number: H01L29/0649 ,  H01L21/762 ,  H01L21/76224 ,  H01L21/823481 ,  H01L23/5223 ,  H01L23/5226 ,  H01L28/00 ,  H01L28/40 ,  H01L29/4175 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48464 ,  H01L2924/00014

Abstract: An integrated circuit is formed by forming an isolation trench through at least a portion of an interconnect region, at least 40 microns deep into a substrate of the integrated circuit, leaving at least 200 microns of substrate material under the isolation trench. Dielectric material is formed in the isolation trench at a substrate temperature no greater than 320° C. to form an isolation structure which separates an isolated region of the integrated circuit from at least a portion of the substrate. The isolated region contains an isolated component. The isolated region of the integrated circuit may be a region of the substrate, and/or a region of the interconnect region. The isolated region may be a first portion of the substrate which is laterally separated from a second portion of the substrate. The isolated region may be a portion of the interconnect region above the isolation structure.

公开(公告)号：US20160308691A1

公开(公告)日：2016-10-20

申请号：US15195687

申请日：2016-06-28

Applicant: Texas Instruments Incorporated

Inventor： Mark W. Morgan ,  Rajarshi Mukhopadhyay

IPC: H04L25/02 ,  H04B3/56

CPC classification number: H04L25/0272 ,  H04B3/54 ,  H04B3/56 ,  H04B2203/5425 ,  H04B2203/5491

Abstract: In described examples, a first isolation element electrically isolates a first circuit from a second circuit and passes AC signals between the first circuit and the second circuit. A second isolation element electrically isolates the first circuit from the second circuit and passes AC signals between the first circuit and the second circuit. A ground of the second circuit electrically floats relative to a ground of the first circuit, so that a digital signal is able to pass from the second circuit through a third isolation element to the first circuit. A supply voltage generation device converts AC signals from the first isolation element and the second isolation element into at least one DC voltage to power the second circuit.

Abstract translation: 在所述示例中，第一隔离元件将第一电路与第二电路电隔离并在第一电路和第二电路之间传递AC信号。 第二隔离元件将第一电路与第二电路电隔离并在第一电路和第二电路之间传递AC信号。 第二电路的接地相对于第一电路的接地电浮动，使得数字信号能够从第二电路通过第三隔离元件传递到第一电路。 电源电压产生装置将来自第一隔离元件和第二隔离元件的交流信号转换为至少一个直流电压以为第二电路供电。

公开(公告)号：US09473092B2

公开(公告)日：2016-10-18

申请号：US14587863

申请日：2014-12-31

Applicant: Texas Instruments Incorporated

Inventor： Dina Reda El-Damak ,  Rajarshi Mukhopadhyay ,  Jeffrey Anthony Morroni

IPC: H03F3/45

CPC classification number: H03F3/45645 ,  H03F3/3028 ,  H03F3/45206 ,  H03F3/45233 ,  H03F3/45273 ,  H03F3/45771 ,  H03F2203/45002 ,  H03F2203/45048 ,  H03F2203/45078 ,  H03F2203/45116

Abstract: An amplifier receives a differential signal and, in response, generates a first negative input current and a first positive input current. In a first operating mode, the amplifier receives a second differential signal, and, in response, generates a second negative input current and a second positive input current. In a second operating mode, the amplifier receives the second differential signal, and, in response, generates a third negative input current and a third positive input current. When the device is operating in the first operating mode, the first negative input current is summed with the second negative input current and the first positive input current is summed with the second positive input current. When the device is operating in the second operating mode, the first negative input current is summed with the third negative input current and the first positive input current is summed with the third positive input current.

Abstract translation: 放大器接收差分信号，作为响应，产生第一负输入电流和第一正输入电流。 在第一操作模式中，放大器接收第二差分信号，并且作为响应，产生第二负输入电流和第二正输入电流。 在第二操作模式中，放大器接收第二差分信号，并且作为响应，产生第三负输入电流和第三正输入电流。 当器件在第一工作模式下工作时，第一个负输入电流与第二个负输入电流相加，第一个正输入电流与第二个正输入电流相加。 当器件在第二工作模式下工作时，第一个负输入电流与第三个负输入电流相加，第一个正输入电流与第三个正输入电流相加。

公开(公告)号：US09419075B1

公开(公告)日：2016-08-16

申请号：US14701484

申请日：2015-04-30

Applicant: Texas Instruments Incorporated

Inventor： Dan Carothers ,  Rajarshi Mukhopadhyay ,  Paul Brohlin ,  Benjamin Cook

IPC: H01L21/76 ,  H01L29/06 ,  H01L23/522 ,  H01L23/528 ,  H01L21/762 ,  H01L21/8234 ,  H01L21/02 ,  H01L21/78 ,  H01L21/683

CPC classification number: H01L21/6835 ,  H01L21/02282 ,  H01L21/02288 ,  H01L21/31053 ,  H01L21/76224 ,  H01L21/78 ,  H01L21/823481 ,  H01L23/5223 ,  H01L23/528 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/13 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device is formed on a semiconductor substrate, including a primary portion of the substrate. An active component of the semiconductor device is disposed in the primary portion of the substrate. An interconnect region is formed on a top surface of the substrate. Semiconductor material is removed from the substrate in an isolation region, which is separate from the primary portion of the substrate; the isolation region extends from the top surface of the substrate to a bottom surface of the substrate. A dielectric replacement material is formed in the isolation region. The semiconductor device further includes an isolated component which is not disposed in the primary portion of the substrate. The dielectric replacement material in the isolation region separates the isolated component from the primary portion of the substrate.

Abstract translation: 半导体器件形成在包括衬底的主要部分的半导体衬底上。 半导体器件的有源部件设置在基板的主要部分中。 在衬底的顶表面上形成互连区。 在与衬底的主要部分分离的隔离区域中从衬底去除半导体材料; 隔离区域从衬底的顶表面延伸到衬底的底表面。 电介质替代材料形成在隔离区域中。 半导体器件还包括未设置在基板的主要部分中的隔离部件。 隔离区域中的电介质替代材料将隔离的部件与基板的主要部分分离。

公开(公告)号：US20140306764A1

公开(公告)日：2014-10-16

申请号：US13864111

申请日：2013-04-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Matthew David Rowley ,  Rajarshi Mukhopadhyay

IPC: H03F1/08

CPC classification number: H03F3/45188 ,  H03F1/14

Abstract: Amplifier circuits and methods of cancelling the Miller effects in amplifiers are disclosed herein. An embodiment of an amplifier circuit includes an input and an output. An amplifier is connected between the input and the output of the circuit. A voltage source is connected to the output, wherein the voltage source output is one hundred eighty degrees out of phase with the voltage output by the amplifier, and wherein the voltage source cancels gain due to the Miller effect of a Miller capacitance between the input and output.

Abstract translation: 本文公开了放大器电路和消除放大器中的米勒效应的方法。 放大器电路的实施例包括输入和输出。 放大器连接在电路的输入和输出端之间。 电压源连接到输出端，其中电压源输出与放大器输出的电压相差一百八十度，并且其中电压源由于米勒对输入和输出之间的米勒电容的影响而抵消了增益。 输出。

公开(公告)号：US11538771B2

公开(公告)日：2022-12-27

申请号：US16985052

申请日：2020-08-04

Applicant: Texas Instruments Incorporated

Inventor： Barry Jon Male ,  Rajarshi Mukhopadhyay

IPC: H01L23/64 ,  H01F17/00 ,  H01F27/24 ,  H01F27/28 ,  H01F41/04 ,  H01L23/495 ,  H01L23/522 ,  H01L23/66 ,  H01L49/02

Abstract: In a described example, an integrated circuit includes: a semiconductor substrate having a first surface and an opposite second surface; at least one dielectric layer overlying the first surface of the semiconductor substrate; at least one inductor coil in the at least one dielectric layer with a plurality of coil windings separated by coil spaces, the at least one inductor coil lying in a plane oriented in a first direction parallel to the first surface of the semiconductor substrate, the at least one inductor coil electrically isolated from the semiconductor substrate by a portion of the at least one dielectric layer; and trenches extending into the semiconductor substrate in a second direction at an angle with respect to the first direction, the trenches underlying the inductor coil and filled with dielectric replacement material.

公开(公告)号：US10742209B2

公开(公告)日：2020-08-11

申请号：US16273851

申请日：2019-02-12

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Olivier Trescases ,  Johan Tjeerd Strydom ,  Rajarshi Mukhopadhyay

IPC: H03K3/00 ,  H03K17/687 ,  H03K5/08 ,  H03K17/042 ,  H01L29/16 ,  H03K17/082

Abstract: Methods and circuitry for driving a device are disclosed. An example of the circuitry includes a voltage sensing circuit coupled to an input of a transistor, the voltage sensing circuit having a first output at a node, the voltage sensing circuit comprising a capacitive voltage divider, and a current sensing circuit coupled to the input of the transistor and to the voltage sensing circuit, the current sensing circuit having a second output, the current sensing circuit comprising a resistive divider coupled to the input of the transistor.

公开(公告)号：US20200240811A1

公开(公告)日：2020-07-30

申请号：US16844547

申请日：2020-04-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Arup Polley ,  Srinath Ramaswamy ,  Baher S. Haroun ,  Rajarshi Mukhopadhyay

IPC: G01D5/14 ,  G01D3/036

Abstract: A first amplifier has an input to receive a Hall-signal output current from a first Hall element and has an output to output feedback current in response to the received Hall-signal output current. The Hall-signal output current is impeded by an impedance of the first Hall element. The feedback current is coupled to counterpoise the Hall-signal output current at the input, and a voltage at the output is an amplified Hall output signal. A second amplifier generates a high-frequency portion output signal in response to a difference between the amplified Hall output signal and a Hall-signal output signal from a second Hall element. A filter reduces high-frequency content of the high-frequency portion output signal and generates an offset correction signal. A third amplifier generates a corrected Hall signal in response to a difference between the amplified Hall output signal and the offset correction signal.

公开(公告)号：US20190057942A1

公开(公告)日：2019-02-21

申请号：US15678841

申请日：2017-08-16

Applicant: Texas Instruments Incorporated

Inventor： Barry Jon Male ,  Rajarshi Mukhopadhyay

IPC: H01L23/64 ,  H01F27/28 ,  H01F27/24 ,  H01L49/02 ,  H01L23/495

Abstract: In a described example, an integrated circuit includes: a semiconductor substrate having a first surface and an opposite second surface; at least one dielectric layer overlying the first surface of the semiconductor substrate; at least one inductor coil in the at least one dielectric layer with a plurality of coil windings separated by coil spaces, the at least one inductor coil lying in a plane oriented in a first direction parallel to the first surface of the semiconductor substrate, the at least one inductor coil electrically isolated from the semiconductor substrate by a portion of the at least one dielectric layer; and trenches extending into the semiconductor substrate in a second direction at an angle with respect to the first direction, the trenches underlying the inductor coil and filled with dielectric replacement material.

公开(公告)号：US10197638B2

公开(公告)日：2019-02-05

申请号：US15186383

申请日：2016-06-17

Applicant: Texas Instruments Incorporated

Inventor： Arup Polley ,  Srinath Ramaswamy ,  Baher S. Haroun ,  Rajarshi Mukhopadhyay

IPC: H03F7/06 ,  G01R33/00 ,  G01R33/07 ,  H03F3/38 ,  H03F3/45

Abstract: A high bandwidth Hall sensor includes a high bandwidth path and a low bandwidth path. The relatively high offset (from sensor offset) of the high bandwidth path is estimated using a relatively low offset generated by the low bandwidth path. The relatively high offset of the high bandwidth path is substantially reduced by combining the output of the high bandwidth path with the output of the low bandwidth path to generate a high bandwidth, low offset output. The offset can be further reduced by including transimpedance amplifiers in the high bandwidth sensors to optimize the frequency response of high bandwidth Hall sensor.