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公开(公告)号：US11460551B2
公开(公告)日：2022-10-04
申请号：US16287411
申请日：2019-02-27
发明人： Baher Haroun , Rahmi Hezar , Srinath Ramaswamy , Nirmal C. Warke , David Magee , Ting Li
IPC分类号： G01S7/481 , G01S17/10 , G01S7/4865 , G01S7/484
摘要： A pulsed light source illuminates a scene with a virtual array of points. Light reflected by the scene is detected by a small pixel array, allowing generation of a three-dimensional map of the scene. A processing element processing data output by the small pixel array uses a multipath resolution algorithm to resolve individual objects in the scene.
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公开(公告)号：US10598700B2
公开(公告)日：2020-03-24
申请号：US15395789
申请日：2016-12-30
发明人： Arup Polley , Srinath Ramaswamy , Baher S. Haroun
摘要： One example includes a current measurement system. The system includes at least two magnetic field sensors positioned proximal to and in a predetermined arrangement with respect to a current conductor, each of the magnetic field sensors being configured to measure magnetic field associated with a current flowing in the current conductor and provide respective magnetic field measurements. The system also includes a current measurement processor configured to implement a mathematical algorithm based on a Taylor series expansion of the magnetic field measurements to calculate an amplitude of the current based on the mathematical algorithm.
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公开(公告)号：US10191097B2
公开(公告)日：2019-01-29
申请号：US15389053
申请日：2016-12-22
发明人： Charles Kasimer Sestok, IV , Srinath Ramaswamy , Anand Ganesh Dabak , Domingo G. Garcia , Baher Haroun , Alan Henry Leek , Ryan Michael Brown
IPC分类号： G01R27/16
摘要： A microcontroller-based system for measuring the impedance of a device under test (DUT), responsive to a square wave stimulus, includes parallel stimulus signal paths, selectable by a switch, that can correspond to different stimulus frequency ranges. At least one of the paths includes an off-chip PLL and integer divider circuit to modify the frequency of the stimulus. A discrete Fourier transform executed by a processor is used to determine the impedance of the DUT at the stimulus frequency. Multiple frequencies can be analyzed at the same time by using a summation circuit and/or by analyzing odd harmonics of the stimulus frequency.
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公开(公告)号：US09778288B2
公开(公告)日：2017-10-03
申请号：US14986121
申请日：2015-12-31
CPC分类号： G01R15/185 , G01R15/207 , G01R19/0092 , G01R33/04
摘要： Operating a current sensor by conducting a current serially through a first region and a second region of an electrically conductive member. A first magnetic field produced by the current in the first region is sensed using a first magnetic field based current (MFBC) sensor having a first sensitivity. The sensitivity of a second MFBC is reduced. A second magnetic field produced by the current in the second region is sensed using the second MFBC sensor having a reduced sensitivity, in which the reduced sensitivity is lower than the first sensitivity. A magnitude of the current is calculated based on the first magnetic field and the second magnetic field. A dynamic range of the current sensor is extended by calculating a magnitude of the current using the second magnetic field after the first MFBC is saturated.
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公开(公告)号：US09711715B2
公开(公告)日：2017-07-18
申请号：US15189114
申请日：2016-06-22
IPC分类号： G11C11/22 , H01L43/12 , H01L21/66 , H01L27/115
CPC分类号： H01L43/12 , G11C11/221 , G11C11/2273 , G11C11/2275 , G11C2211/4013 , H01L22/14 , H01L27/115
摘要： Read-only (“RO”) data to be permanently imprinted in storage cells of a memory array are written to the memory array. One or more over-stress conditions such as heat, over-voltage, over-current and/or mechanical stress are then applied to the memory array or to individual storage cells within the memory array. The over-stress condition(s) act upon one or more state-determining elements of the storage cells to imprint the RO data. The over-stress condition permanently alters a value of a state-determining property of the state-determining element without incapacitating normal operation of the storage cell. The altered value of the state-determining property biases the cell according to the state of the RO data bit. The bias is detectable in the cell read-out signal. A pre-written ferroelectric random-access memory (“FRAM”) array is baked. Baking traps electric dipoles oriented in a direction corresponding to a state of the pre-written data and forms am RO data imprint.
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公开(公告)号：US20170011790A1
公开(公告)日：2017-01-12
申请号：US14794560
申请日：2015-07-08
IPC分类号： G11C11/22 , H04L9/08 , H01L27/115
CPC分类号： G11C11/2295 , G11C11/221 , G11C11/2273 , G11C11/2275 , G11C11/2277 , H01L27/11507 , H04L9/3278
摘要： Read-only (“RO”) data consisting of a physically unclonable function (“PUF”) pattern is written to a ferroelectric random-access memory (“FRAM”) memory array. The FRAM array is baked to imprint the PUF pattern with a selected average depth of imprint and a corresponding average read reliability. The average depth of imprint and corresponding average read reliability are determined during testing after baking The PUF pattern as read after baking is compared to the PUF pattern as written prior to baking Additional PUF pattern writing and baking cycles may be performed until the average depth of imprint and associated read reliability reach a first selected level. Integrated circuits determined to be over-imprinted by exceeding a second selected level may be rejected. The first and second levels of PUF pattern imprint are selected such as to produce FRAM arrays with a unique fingerprint for each individual FRAM array-containing integrated circuit.
摘要翻译： 包含物理不可克隆功能（“PUF”）模式的只读（“RO”）数据被写入铁电随机存取存储器（“FRAM”）存储器阵列。 烘烤FRAM阵列以打印具有所选择的平均印刷深度和相应的平均读取可靠性的PUF图案。 在烘烤后的测试期间确定平均印痕深度和相应的平均读取可靠性将烘烤后读取的PUF图案与烘烤前书写的PUF图案进行比较可以进行其它PUF图案书写和烘烤循环，直到平均印痕深度 并且相关的读取可靠性达到第一选定的级别。 被确定为超过第二选定电平的印刷电路的集成电路可能被拒绝。 选择第一和第二级PUF图案印记，以便为每个含有FRAM阵列的集成电路产生具有唯一指纹的FRAM阵列。
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7.发明申请Methods and Apparatus for Reducing Noise, Power and Settling Time in Multi-Modal Analog Multiplexed Data Acquisition Systems 有权用于降低多模态模拟多路复用数据采集系统中噪声，功率和稳定时间的方法和装置公开(公告)号：US20160380660A1
公开(公告)日：2016-12-29
申请号：US15084052
申请日：2016-03-29
发明人： Arup Polley , Ajit Sharma , Seung Bae Lee , Sriram Narayanan , Srinath Ramaswamy
IPC分类号： H04B1/10
CPC分类号： H04B1/1036 , H04B1/0028 , H04B2001/1054
摘要： Reduced noise and power with rapid settling time and increased performance in multi-modal analog multiplexed data acquisition systems. An example apparatus arrangement includes a circuit input configured to receive a plurality of analog input signals; an analog to digital converter circuit configured to output a digital representation of an analog voltage; a selection circuit configured to select one of the analog input signals received at the circuit input; a buffer coupled to receive the selected one of the analog input signals; a filter coupled to the buffer and configured to perform a high bandwidth sample operation and a low bandwidth sample operation and having a filter output, responsive to a control signal; and a sampling capacitor coupled to the filter to sample the filter output, and having an output coupled to the analog to digital converter. Methods and additional apparatus arrangements are disclosed.
摘要翻译： 在多模式模拟复用数据采集系统中，通过快速建立时间和更高性能降低噪声和功耗。 示例性装置配置包括被配置为接收多个模拟输入信号的电路输入; 模数转换器电路，被配置为输出模拟电压的数字表示; 选择电路，被配置为选择在所述电路输入处接收的所述模拟输入信号之一; 耦合以接收所选择的一个模拟输入信号的缓冲器; 滤波器，耦合到所述缓冲器并且被配置为响应于控制信号执行高带宽采样操作和低带宽采样操作并具有滤波器输出; 以及耦合到所述滤波器以对所述滤波器输出进行采样并且具有耦合到所述模数转换器的输出的采样电容器。 公开了方法和附加装置布置。
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8.发明授权公开(公告)号：US11552200B2
公开(公告)日：2023-01-10
申请号：US17347822
申请日：2021-06-15
IPC分类号： H04B10/69 , H01L31/02 , H01L31/107 , H03F3/08
摘要： An avalanche photo-diode (APD) circuit includes a first APD and a bias circuit. The first APD is configured to detect light. The bias circuit is configured to control a gain of the first APD. The bias circuit includes a second APD, a reference voltage source, a bias voltage generation circuit, and a metal layer configured to shield the second APD from the light. The reference voltage source is configured to bias the second APD. The bias voltage generation circuit is configured to generate a bias voltage for biasing the first APD based on dark current output by the second APD.
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公开(公告)号：US20210333390A1
公开(公告)日：2021-10-28
申请号：US17367383
申请日：2021-07-04
摘要： A transducer system with transducer and circuitry for applying a pulse train at a single frequency to excite the transducer. The transducer is operable to receive an echo waveform in response to the pulse train. The system also comprises circuitry for determining a time of flight as between a first reference time associated with the pulse train and a second reference time associated with the echo waveform.
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公开(公告)号：US10191801B2
公开(公告)日：2019-01-29
申请号：US15678315
申请日：2017-08-16
发明人： Sai Zhang , Yuming Zhu , Clive Bittlestone , Srinath Ramaswamy
摘要： Disclosed embodiments include an electronic device having a write-once memory (WOM) and a memory controller. The memory controller includes a host interface receiving a data word including first and second symbols, each having at least two bits, a WOM controller that encodes the first and second symbols and outputs a WOM-encoded word including first and second WOM codes corresponding to the first and second symbols, respectively, an error correction code (ECC) controller that encodes the WOM-encoded word and outputs an ECC-encoded word including the first and second WOM codes and a first set of ECC bits corresponding to a first write operation, and a memory device interface that writes the ECC-encoded word the WOM device in the first write operation. Each of the first and second WOM codes include at least three bits with at least two of the at least three bits having the same logic value.
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