Current measurement and control system

    公开(公告)号:US12019101B2

    公开(公告)日:2024-06-25

    申请号:US17874667

    申请日:2022-07-27

    CPC classification number: G01R15/146 G01R19/252 H02M1/0009

    Abstract: A current measurement and control circuit may comprise a shunt resistor coupled between supply and output nodes; a first resistor coupled to the supply node; a second resistor coupled to ground; and a transconductance amplifier having an input coupled to the first resistor to define a compensation node and another input coupled to the output node. The circuit may also include a first transistor having a first current terminal coupled to the compensation node and a second current terminal coupled to the second resistor to define a measurement node; and a second transistor having a first current terminal coupled to ground and a second current terminal coupled to the output node. The circuit may also include an ADC having an analog input coupled to the measurement node; an IDAC having an analog output coupled to the compensation node; and switches to set the circuit in a measurement or a compensation mode.

    Input current trim for chopper operational amplifier

    公开(公告)号:US11962276B2

    公开(公告)日:2024-04-16

    申请号:US17501210

    申请日:2021-10-14

    Abstract: In examples of a chopper operational amplifier, a current control circuit comprises a pair of voltage sources, each of which may be varied to generate a voltage signal of a particular value, and multiple inverters, each of which is configured to receive either a clock signal or its complement signal and one of the voltage signals. Based on these inputs, each inverter generates a control signal that is delivered to a corresponding switch in the input stage of the chopper operational amplifier to control the gate voltage of that switch. Based on the difference between the values of the voltage signals, the current control circuit operates to reduce the amplitudes of base currents induced by charge injection at the input terminals of the chopper operational amplifier.

    TRIMMING OPERATIONAL AMPLIFIERS
    33.
    发明申请

    公开(公告)号:US20220209730A1

    公开(公告)日:2022-06-30

    申请号:US17136073

    申请日:2020-12-29

    Abstract: Disclosed is a system that comprises an operational amplifier with adjustable operational parameters and a trimming module. The trimming module can adjust the operational parameters of the op-amp based on a memory value to compensate for an offset voltage of the op-amp. The trimming module can comprise successive approximation register (SAR) logic that controls the memory value. The SAR logic can be configured to detect a given memory value that causes an output voltage of the op-amp to be within a predetermined voltage interval when applying a predetermined common mode voltage to inverting and non-inverting inputs of the op-amp.

    CURRENT LIMIT THROUGH REFERENCE MODULATION IN LINEAR REGULATORS

    公开(公告)号:US20210080986A1

    公开(公告)日:2021-03-18

    申请号:US16934334

    申请日:2020-07-21

    Abstract: A linear regulator system is described. The linear regulator system includes a linear regulator core circuit including a pass element adapted to provide an output voltage, and a voltage error amplifier circuit coupled to the pass element and adapted to regulate the output voltage to form a regulated output voltage, based on an output reference voltage. The linear regulator core circuit further includes a current limit circuit comprising a current limit switch element coupled to the voltage error amplifier circuit and adapted to selectively modulate the output reference voltage of the voltage error amplifier circuit to form a current limited reference voltage, based on a current limit control signal received at a current limit control terminal associated therewith, in order to limit a load current through the pass element from exceeding a predefined maximum allowable load current limit.

    Amplifier class AB output stage
    35.
    发明授权

    公开(公告)号:US10855239B2

    公开(公告)日:2020-12-01

    申请号:US16568306

    申请日:2019-09-12

    Abstract: An amplifier includes an input stage, a folded cascode stage, and a class AB output stage. The folded cascode stage is coupled to the input stage. The class AB output stage is coupled to the folded cascode stage. The class AB output stage includes a high-side output transistor, a low-side output transistor, and a high-side feedback circuit that is coupled to the high-side output transistor. The high-side feedback circuit includes a high-side sense transistor and a high-side feedback transistor. The high-side sense transistor includes a control terminal that is coupled to a control terminal of the high-side output transistor. The high-side feedback transistor is coupled to an output of the high-side sense transistor and to the folded cascode stage. A first output of the folded cascode stage is coupled to the control terminal of the high-side sense transistor and to the control terminal of the high-side output transistor.

    SAMPLE AND HOLD CIRCUIT
    37.
    发明申请

    公开(公告)号:US20200090777A1

    公开(公告)日:2020-03-19

    申请号:US16248283

    申请日:2019-01-15

    Abstract: A sample and hold circuit with long hold time. A sample and hold circuit includes an amplifier, a capacitor, a switch, and a sampling network. The capacitor includes a first terminal coupled to an inverting input of the amplifier. The switch includes a first terminal that is coupled to an output of the amplifier, and a second terminal that is coupled to the inverting input of the amplifier. The sampling network is coupled to a non-inverting input of the amplifier.

    Differential input stage with wide input signal range and stable transconductance

    公开(公告)号:US10218324B2

    公开(公告)日:2019-02-26

    申请号:US15395073

    申请日:2016-12-30

    Abstract: At least some embodiments are directed to a system that comprises a differential input transistor pair (DITP) comprising first and second transistors, a first feedback loop coupled to the first transistor, and a second feedback loop coupled to the second transistor. When a differential voltage applied to the input stage is within a first range, the first and second feedback loops control a tail current supplied to the DITP, where the tail current at least partially determines a transconductance of the DITP. When the differential voltage is within a second range, the transconductance of the DITP is at least partially determined by a first resistor in the first feedback loop or by a second resistor in the second feedback loop.

    High voltage input circuit for a differential amplifier

    公开(公告)号:US09837973B2

    公开(公告)日:2017-12-05

    申请号:US13950643

    申请日:2013-07-25

    CPC classification number: H03F3/45376 H03F2203/45568 H03F2203/45571

    Abstract: A differential input circuit (FIG. 3A) is disclosed. The circuit includes a first input terminal (drain of 310) and a second input terminal (drain of 312). A first input transistor (310) has a first control terminal and has a current path coupled to the first input terminal. A second input transistor (312) has a second control terminal and has a current path coupled to the second input terminal. A third transistor (306) has a third control terminal and has a current path between a first differential input terminal (Vin+) and the first control terminal. A fourth transistor (308) has a fourth control terminal and has a current path between a second differential input terminal (Vin−) and the second control terminal.

    Circuits and methods for trimming an output parameter

    公开(公告)号:US09817429B2

    公开(公告)日:2017-11-14

    申请号:US14749888

    申请日:2015-06-25

    CPC classification number: G05F3/30 G05F3/20

    Abstract: Methods and circuits for adjusting the output parameter of a device wherein the output parameter is temperature dependent are disclosed herein. An example of a method includes: adjusting the output parameter to a target level at a first temperature; adjusting a linear temperature-dependent variable related to the output parameter to zero at the first temperature; adjusting a nonlinear temperature-dependent variable related to the output parameter to zero at the first temperature; adjusting the output parameter to the target level at a second temperature using the linear-dependent variable; adjusting the nonlinear temperature-dependent variable to zero at the second temperature; and adjusting the output parameter to the target level at a third temperature by adjusting the nonlinear variable.

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