公开(公告)号：US11710659B2

公开(公告)日：2023-07-25

申请号：US17646024

申请日：2021-12-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Li-Chieh Wu ,  Tang-Kuei Chang ,  Kuo-Hsiu Wei ,  Kei-Wei Chen ,  Ying-Lang Wang ,  Su-Hao Liu ,  Kuo-Ju Chen ,  Liang-Yin Chen ,  Huicheng Chang ,  Ting-Kui Chang ,  Chia Hsuan Lee

IPC: H01L21/768 ,  H01L23/522 ,  H01L29/66 ,  H01L29/78 ,  H01L23/485 ,  H01L21/3115 ,  H01L23/532

CPC classification number: H01L21/76883 ,  H01L21/76825 ,  H01L23/5226 ,  H01L21/31155 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/76886 ,  H01L23/485 ,  H01L23/5329 ,  H01L23/53295 ,  H01L29/66795 ,  H01L29/785 ,  H01L2029/7858

Abstract: The present disclosure provides methods for forming conductive features in a dielectric layer without using adhesion layers or barrier layers and devices formed thereby. In some embodiments, a structure comprising a dielectric layer over a substrate, and a conductive feature disposed through the dielectric layer. The dielectric layer has a lower surface near the substrate and a top surface distal from the substrate. The conductive feature is in direct contact with the dielectric layer, and the dielectric layer comprises an implant species. A concentration of the implant species in the dielectric layer has a peak concentration proximate the top surface of the dielectric layer, and the concentration of the implant species decreases from the peak concentration in a direction towards the lower surface of the dielectric layer.

公开(公告)号：US11631618B2

公开(公告)日：2023-04-18

申请号：US17143032

申请日：2021-01-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih Hung Chen ,  Kei-Wei Chen ,  Ying-Lang Wang

IPC: H01L21/66 ,  H01L21/321 ,  B24B37/013 ,  G01B7/06

Abstract: Various embodiments provide a thickness sensor and method for measuring a thickness of discrete conductive features, such as conductive lines and plugs. In one embodiment, the thickness sensor generates an Eddy current in a plurality of discrete conductive features, and measures the generated Eddy current generated in the discrete conductive features. The thickness sensor has a small sensor spot size, and amplifies peaks and valleys of the measured Eddy current. The thickness sensor determines a thickness of the discrete conductive features based on a difference between a minimum amplitude value and a maximum amplitude value of the measured Eddy current.

公开(公告)号：US11183631B2

公开(公告)日：2021-11-23

申请号：US16662422

申请日：2019-10-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wen-Ting Chu ,  Tong-Chern Ong ,  Ying-Lang Wang

IPC: H01L45/00 ,  H01L27/24

Abstract: The present disclosure, in some embodiments, relates to a resistive random access memory (RRAM) device. The RRAM device includes a bottom electrode that is disposed over a lower interconnect layer surrounded by a lower inter-level dielectric (ILD) layer. A data storage structure is arranged over the bottom electrode and a multi-layer top electrode is disposed over the data storage structure. The multi-layer top electrode includes conductive top electrode layers separated by an oxygen barrier structure that is configured to mitigate movement of oxygen between the conductive top electrode layers. A sidewall spacer is disposed directly over the bottom electrode and has a sidewall that covers outermost sidewalls of the conductive top electrode layers and the oxygen barrier structure.

公开(公告)号：US20210036129A1

公开(公告)日：2021-02-04

申请号：US17068578

申请日：2020-10-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih Hung Chen ,  Kei-Wei Chen ,  Ying-Lang Wang

IPC: H01L29/66 ,  H01L29/40 ,  H01L21/67 ,  H01L21/321 ,  B24B37/00 ,  B24B37/10 ,  B24B7/22

Abstract: In an embodiment, a method includes: performing a self-limiting process to modify a top surface of a wafer; after the self-limiting process completes, removing the modified top surface from the wafer; and repeating the performing the self-limiting process and the removing the modified top surface from the wafer until a thickness of the wafer is decreased to a predetermined thickness.

公开(公告)号：US10516106B2

公开(公告)日：2019-12-24

申请号：US15939832

申请日：2018-03-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wen-Ting Chu ,  Tong-Chern Ong ,  Ying-Lang Wang

IPC: H01L45/00 ,  H01L27/24

Abstract: The present disclosure relates to a resistive random access memory (RRAM) device. In some embodiments, the RRAM device has a bottom electrode disposed over a lower interconnect layer surrounded by an inter-level dielectric (ILD) layer. A dielectric data storage layer having a variable resistance is located above the bottom electrode, and a multi-layer top electrode is disposed over the dielectric data storage layer. The multi-layer top electrode has conductive top electrode layers separated by an oxygen barrier structure configured to mitigate movement of oxygen within the multi-layer top electrode. By including an oxygen barrier structure within the top electrode, the reliability of the RRAM device is improved since oxygen is kept close to the dielectric data storage layer.

公开(公告)号：US20180375024A1

公开(公告)日：2018-12-27

申请号：US15939832

申请日：2018-03-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wen-Ting Chu ,  Tong-Chern Ong ,  Ying-Lang Wang

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1246 ,  H01L27/2436 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1608

Abstract: The present disclosure relates to an RRAM device having an electrode with an oxygen barrier structure, which is configured to improve RRAM reliability by mitigating oxygen movement and thereby maintaining oxygen within close proximity of a dielectric data storage layer, and an associated method of formation. In some embodiments, the RRAM device has a bottom electrode disposed over a lower interconnect layer surrounded by a ILD layer. A dielectric data storage layer having a variable resistance is located above the bottom electrode, and a multi-layer top electrode disposed over the dielectric data storage layer. The multi-layer top electrode has conductive top electrode layers separated by an oxygen barrier structure configured to mitigate movement of oxygen within the multi-layer top electrode. By including an oxygen barrier structure within the top electrode, the reliability of the RRAM device is improved since oxygen is kept close to the dielectric data storage layer.