公开(公告)号：US20220336623A1

公开(公告)日：2022-10-20

申请号：US17856892

申请日：2022-07-01

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yi-Chen LO ,  Jung-Hao CHANG ,  Li-Te LIN ,  Pinyen LIN

IPC: H01L29/51 ,  H01L29/66 ,  H01L29/78 ,  H01L21/3065 ,  H01L21/02 ,  H01L21/28 ,  H01L21/67 ,  H01J37/00 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/423 ,  H01L21/311 ,  H01L21/3213

Abstract: A semiconductor device includes first and second gate structures over a substrate, the first gate structure has a first width that is smaller than a second width of the second gate structure, in which a lower portion of the first gate structure having a first work-function material (WFM) layer, the first WFM layer having a top surface, a lower portion of the second gate structure having a second WFM layer, the second WFM layer having a top surface. A first gate electrode is disposed over the first WFM layer and a second gate electrode has a lower portion disposed in the second WFM layer, in which the first gate electrode has a first width that is smaller than a second width of the second gate electrode, and wherein the top surface of the second WFM layer is at a level below a top surface of the second gate electrode.

公开(公告)号：US20220157648A1

公开(公告)日：2022-05-19

申请号：US17666368

申请日：2022-02-07

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chan-Syun David YANG ,  Li-Te LIN ,  Yu-Ming LIN

IPC: H01L21/768 ,  H01L21/311 ,  H01L21/67

Abstract: An equipment includes a supporter and an etching device. The supporter is configured to support a semiconductor device. The semiconductor device includes an etch stop layer, a material layer, and a mask layer. The mask layer has openings to expose portions of the material layer. The etching device is configured to emit a plurality of directional charged particle beams to etch the exposed portions of the material layer for forming gaps in the material layer, in which the etching device has plural ion extraction apertures to emit the directional charged particle beams. A vertical distance between the semiconductor device and the ion extraction apertures is determined in accordance with a profile of each of the gap, each of the directional charged particle beams has two energy peaks at two angles, and the angles are determined in accordance with a profile of each of the gaps and the vertical distance.

公开(公告)号：US20210384325A1

公开(公告)日：2021-12-09

申请号：US17411704

申请日：2021-08-25

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jung-Hao CHANG ,  Li-Te LIN

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/40 ,  H01L21/311 ,  H01L21/3213

Abstract: A semiconductor device includes a substrate, a semiconductor fin, gate spacers, a gate structure. The semiconductor fin is on the substrate. The gate spacers are over the semiconductor fin. The gate structure is on the semiconductor fin and between the gate spacers. The gate structure includes a gate dielectric layer and a first work function metal over the gate dielectric layer, in which a top surface of the first work function metal is lower than a top surface of the gate dielectric layer, and a distance between the top surface of the first work function metal and the top surface of the gate dielectric layer is less than about 1 nm.

公开(公告)号：US20210313449A1

公开(公告)日：2021-10-07

申请号：US16837432

申请日：2020-04-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tze-Chung LIN ,  Han-Yu LIN ,  Li-Te LIN ,  Pinyen LIN

IPC: H01L29/66 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/423

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a plurality of first semiconductor layers and a plurality of second semiconductor layers on a substrate, and the first semiconductor layers and the second semiconductor layers are alternately stacked. The method also includes forming a dummy gate structure over the first semiconductor layers and the second semiconductor layers. The method further includes removing a portion of the first semiconductor layers and second semiconductor layers to form a trench, and removing the second semiconductor layers to form a recess between two adjacent first semiconductor layers. The method includes forming a dummy dielectric layer in the recess, and removing a portion of the dummy dielectric layer to form a cavity. The method also includes forming an inner spacer layer in the cavity.

公开(公告)号：US20210305409A1

公开(公告)日：2021-09-30

申请号：US17333676

申请日：2021-05-28

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Zhi-Qiang WU ,  Kuo-An LIU ,  Chan-Lon YANG ,  Bharath Kumar PULICHERLA ,  Li-Te LIN ,  Chung-Cheng WU ,  Gwan-Sin CHANG ,  Pinyen LIN

IPC: H01L29/66 ,  H01L21/311 ,  H01L21/3213 ,  H01L29/78 ,  H01L29/49 ,  H01L29/40

Abstract: A semiconductor device includes a substrate having a semiconductor fin. A gate structure is over the semiconductor fin, in which the gate structure has a tapered profile and comprises a gate dielectric. A work function metal layer is over the gate dielectric, and a filling metal is over the work function metal layer. A gate spacer is along a sidewall of the gate structure, in which the work function metal layer is in contact with the gate dielectric and a top portion of the gate spacer. An epitaxy structure is over the semiconductor fin.

公开(公告)号：US20210066490A1

公开(公告)日：2021-03-04

申请号：US16559343

申请日：2019-09-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chansyun David Yang ,  Han-Yu Lin ,  Chun-Yu Chen ,  Chih-Ching Wang ,  Fang-Wei Lee ,  Tze-Chung LIN ,  Li-Te LIN ,  Gwan-Sin Chang ,  Pinyen LIN

IPC: H01L29/78 ,  H01L21/8234 ,  H01L29/417 ,  H01L29/66

Abstract: The current disclosure describes techniques for forming a gate-all-around device where semiconductor layers are released by etching out the buffer layers that are vertically stacked between semiconductor layers in an alternating manner. The buffer layers stacked at different vertical levels include different material compositions, which bring about different etch rates with respect to an etchant that is used to remove at least partially the buffer layers to release the semiconductor layers.

公开(公告)号：US20190164812A1

公开(公告)日：2019-05-30

申请号：US16222787

申请日：2018-12-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yi-Shan CHEN ,  Chan-Syun David YANG ,  Li-Te LIN ,  Pinyen LIN

IPC: H01L21/768 ,  H01L23/528 ,  H01L21/32 ,  H01L21/033 ,  H01L21/311

Abstract: A method is provided. A sacrificial layer is formed over a semiconductor substrate. An etching process is performed to form an opening in the sacrificial layer. The etching process includes a first cycle and a second cycle performed after the first cycle, and each of the first cycle and the second cycle includes applying a passivation gas and an etchant gas over the sacrificial layer, and performing an ionized gas bombardment on the sacrificial layer after applying the passivation gas and the etchant gas over the sacrificial layer. The passivation gas is applied at a first flow rate in the first cycle and is applied at a second flow rate in the second cycle, and the first flow rate is higher than the second flow rate.

公开(公告)号：US20190148524A1

公开(公告)日：2019-05-16

申请号：US16229979

申请日：2018-12-21

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yi-Chen LO ,  Yu-Lien HUANG ,  Li-Te LIN

IPC: H01L29/66 ,  H01L21/768 ,  H01L21/02 ,  H01L29/08 ,  H01L21/8234 ,  H01L21/3213 ,  H01L21/311 ,  H01L29/423

Abstract: A method for fabricating a semiconductor device includes forming a gate electrode structure over a first region of a semiconductor substrate, and selectively forming an oxide layer overlying the gate electrode structure by reacting a halide compound with oxygen to increase a height of the gate electrode structure. The halide compound may be silicon tetrachloride, and the oxide layer may be silicon dioxide. The gate electrode structure may be a dummy gate electrode, which is subsequently removed, and replaced with another gate electrode structure.