公开(公告)号：US08482631B2

公开(公告)日：2013-07-09

申请号：US13049466

申请日：2011-03-16

申请人： Akira Yoshino ,  Keiichiro Yanagida ,  Teppei Nakano

发明人： Akira Yoshino ,  Keiichiro Yanagida ,  Teppei Nakano

IPC分类号： H04N9/73

CPC分类号： H04N9/735

摘要： According to one embodiment, a false color mask signal generation circuit generates a false color pixel mask signal to exclude false color component pixels based on an edge component signal from an edge component extraction circuit. A white balance gain calculation circuit calculates a white balance gain from an integrated value calculated by the false color component pixels being excluded based on the false color pixel mask signal.

摘要翻译： 根据一个实施例，假彩色掩模信号产生电路根据来自边缘分量提取电路的边缘分量信号产生假彩色像素掩码信号以排除伪色成分像素。 白平衡增益计算电路根据由假彩色像素掩模信号排除的假颜色分量像素计算出的积分值来计算白平衡增益。

公开(公告)号：US20090223247A1

公开(公告)日：2009-09-10

申请号：US11993907

申请日：2006-06-16

申请人： Akira Yoshino ,  Koji Tanaka ,  Ryosuke Matsubayashi ,  Junya Suenaga ,  Shinya Okumura

发明人： Akira Yoshino ,  Koji Tanaka ,  Ryosuke Matsubayashi ,  Junya Suenaga ,  Shinya Okumura

IPC分类号： F25J3/02

CPC分类号： F25J3/04181 ,  F25J3/04157 ,  F25J3/0423 ,  F25J3/04254 ,  F25J3/04412 ,  F25J3/04824 ,  F25J2200/90 ,  F25J2205/70 ,  F25J2210/42 ,  F25J2210/50 ,  F25J2215/50 ,  F25J2290/62

摘要： There is provided a method of generating nitrogen which includes cryogenically separating compressed air introduced into a high-pressure column 11, storing liquid air 13 in a bottom portion of the high-pressure column 11 and taking nitrogen in gaseous form from an upper portion of the high-pressure column 11, introducing the liquid air 13 stored in the bottom portion of the high-pressure column 11 into a low-pressure column 12, cryogenically separating the liquid air 13 introduced into the low-pressure column 12 and storing oxygen-enriched liquid air 22 in a bottom portion of the low-pressure column 12 and taking nitrogen in gaseous form from an upper portion of the low-pressure column 12 as a product gas. Liquid air 13 taken through an extraction pipe 20 is introduced into a portion of a rectification part 12a of the low-pressure column 12 in which the number of theoretical plates from a column bottom side is set within the range of one to ten.

摘要翻译： 提供了一种产生氮气的方法，其包括将引入高压塔11的压缩空气进行低温分离，将液体空气13储存在高压塔11的底部并从气体形式的上部取出氮气 高压塔11将存储在高压塔11的底部的液体空气13引入低压塔12，将引入低压塔12的液体空气13进行低温分离并将富氧 在低压塔12的底部的液体空气22作为产品气体从低压塔12的上部取出气态氮气。 通过抽取管20取出的液体空气13被引入到从塔底侧的理论塔板数设定在1〜10的范围内的低压塔12的整流部12a的一部分。

公开(公告)号：US07582930B2

公开(公告)日：2009-09-01

申请号：US11377019

申请日：2006-03-16

申请人： Akira Yoshino ,  Yutaka Akiyama

发明人： Akira Yoshino ,  Yutaka Akiyama

IPC分类号： H01L21/336 ,  H01L29/788

CPC分类号： H01L27/11521 ,  H01L21/265 ,  H01L21/2652 ,  H01L21/28273 ,  H01L27/115 ,  H01L29/42324

摘要： A coupling oxide film is formed on a silicon substrate, a polysilicon film is further formed thereupon, and a low-temperature oxide film is deposited to a thickness of 10 nm, for example. Next, a silicon nitride film is formed on this low-temperature oxide film, and selectively removed by dry etching. At this time, the low-temperature oxide film serves as an etching stopper film, so the low-temperature oxide film and polysilicon film are not over-etched. Subsequently, the polysilicon film is dry-etched, forming a recess. A floating gate is then formed of the polysilicon film.

摘要翻译： 在硅衬底上形成耦合氧化物膜，在其上进一步形成多晶硅膜，并且例如以10nm的厚度沉积低温氧化膜。 接下来，在该低温氧化膜上形成氮化硅膜，通过干蚀刻选择性地除去。 此时，低温氧化膜用作蚀刻停止膜，因此低温氧化膜和多晶硅膜不被过蚀刻。 随后，多晶硅膜被干蚀刻，形成凹陷。 然后由多晶硅膜形成浮栅。

公开(公告)号：US20060175655A1

公开(公告)日：2006-08-10

申请号：US11377019

申请日：2006-03-16

申请人： Akira Yoshino ,  Yutaka Akiyama

发明人： Akira Yoshino ,  Yutaka Akiyama

IPC分类号： H01L29/788 ,  H01L21/336

CPC分类号： H01L27/11521 ,  H01L21/265 ,  H01L21/2652 ,  H01L21/28273 ,  H01L27/115 ,  H01L29/42324

摘要： A coupling oxide film is formed on a silicon substrate, a polysilicon film is further formed thereupon, and a low-temperature oxide film is deposited to a thickness of 10 nm, for example. Next, a silicon nitride film is formed on this low-temperature oxide film, and selectively removed by dry etching. At this time, the low-temperature oxide film serves as an etching stopper film, so the low-temperature oxide film and polysilicon film are not over-etched. Subsequently, the polysilicon film is dry-etched, forming a recess. A floating gate is then formed of the polysilicon film.

公开(公告)号：US06979856B2

公开(公告)日：2005-12-27

申请号：US10648295

申请日：2003-08-27

申请人： Teiichiro Nishizaka ,  Isami Sakai ,  Akira Yoshino ,  Shinichi Kawai ,  Kiyokazu Ishige ,  Tomohiro Hamajima ,  Motoko Tanaka

发明人： Teiichiro Nishizaka ,  Isami Sakai ,  Akira Yoshino ,  Shinichi Kawai ,  Kiyokazu Ishige ,  Tomohiro Hamajima ,  Motoko Tanaka

IPC分类号： H01L21/8247 ,  G11C16/04 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L29/76

CPC分类号： H01L27/11568 ,  G11C16/0416 ,  H01L27/115

摘要： A semiconductor memory device includes a first insulating film provided on a semiconductor substrate between first and second diffusion regions, a first gate electrode provided on the first insulating film, a second insulating film provided on the semiconductor substrate between the second diffusion region and a third diffusion region, and a second gate electrode provided on the second insulating film. The first and second diffusion regions, first insulating film, and first gate electrode constitute a first memory cell, while the second and third diffusion regions, second insulating film, and second gate electrode constitute a second memory cell. The first and second gate electrodes are connected in common to form a word line electrode. The first and third diffusion regions are connected to first and second read bit lines. The second diffusion region is connected to a program and erase bit line.

摘要翻译： 半导体存储器件包括设置在第一和第二扩散区域之间的半导体衬底上的第一绝缘膜，设置在第一绝缘膜上的第一栅电极，设置在第二扩散区和第三扩散区之间的半导体衬底上的第二绝缘膜 以及设置在第二绝缘膜上的第二栅电极。 第一和第二扩散区域，第一绝缘膜和第一栅电极构成第一存储单元，而第二和第三扩散区域，第二绝缘膜和第二栅电极构成第二存储单元。 第一和第二栅电极共同连接形成字线电极。 第一和第三扩散区域连接到第一和第二读取位线。 第二扩散区连接到编程和擦除位线。

公开(公告)号：US20050214996A1

公开(公告)日：2005-09-29

申请号：US11115276

申请日：2005-04-27

申请人： Akira Yoshino

发明人： Akira Yoshino

IPC分类号： H01L21/8247 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L21/336 ,  H01L21/8234

CPC分类号： H01L27/11568 ,  H01L27/115

摘要： Nonvolatile semiconductor memory devices and methods for manufacturing thereof, which provide inhibiting the shortcutting of the channel due to the creation of the bird's beak to promote the manufacturing of the devices with higher-density or higher-integration, lowering the operation voltage and improving the characteristics of maintaining the electric charge, without complicating the manufacturing process. Immediately after forming ONO films comprising a first silicon oxide film, a second silicon nitride film and a third silicon oxide film on a silicon substrate, a silicon layer is formed, and then, arsenic ions are implanted over the silicon layer and/or ONO films to form a bit line, and a second electrical conductive layer is deposited while remaining the silicon layer to form a word line comprising a dual layer structure of two electrical conductive layers.

摘要翻译： 非易失性半导体存储器件及其制造方法，其特征在于，抑制由于鸟嘴形成而导致的通道的快捷性，以促进具有更高密度或更高集成度的器件的制造，降低工作电压和改善特性 维持电荷，而不会使制造过程复杂化。 在硅基板上形成包含第一氧化硅膜，第二氮化硅膜和第三氧化硅膜的ONO膜之后，立即形成硅层，然后将砷离子注入到硅层和/或ONO膜上 以形成位线，并且在保留硅层的同时沉积第二导电层以形成包括两个导电层的双层结构的字线。

公开(公告)号：US06927446B2

公开(公告)日：2005-08-09

申请号：US10418057

申请日：2003-04-18

申请人： Akira Yoshino

发明人： Akira Yoshino

IPC分类号： H01L21/8247 ,  H01L21/28 ,  H01L21/336 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L29/76

CPC分类号： H01L27/11568 ,  H01L21/28282 ,  H01L27/115 ,  H01L29/66833 ,  H01L29/7887 ,  H01L29/7923

摘要： A first diffused layer and a second diffused layer are formed on the major surface of a silicon substrate. A first insulating layer, a second insulating layer or a semiconductor layer, and a third insulating layer are laminated on the major surface of the silicon substrate in the vicinity of the first diffused layer or the second diffused layer and are partially formed. A fourth insulating layer is formed as a gate insulating film. A fifth insulating layer is formed on the side walls of the second insulating layer or the semiconductor layer. In a region of most of a channel, the gate insulating film is formed and a gate electrode is formed so that it covers the gate insulating film and the laminated films. According to this structure, the operating voltage of a flash memory is reduced, the operation is easily sped up and the holding characteristic of information charge can be enhanced.

摘要翻译： 第一扩散层和第二扩散层形成在硅衬底的主表面上。 第一绝缘层，第二绝缘层或半导体层以及第三绝缘层层叠在第一扩散层或第二扩散层附近的硅衬底的主表面上，并且部分地形成。 第四绝缘层形成为栅极绝缘膜。 在第二绝缘层或半导体层的侧壁上形成第五绝缘层。 在通道的大部分区域中，形成栅极绝缘膜，并且形成栅电极以覆盖栅极绝缘膜和层叠膜。 根据该结构，闪速存储器的工作电压降低，操作容易加快，并且可以提高信息电荷的保持特性。

公开(公告)号：US06828619B2

公开(公告)日：2004-12-07

申请号：US10445827

申请日：2003-05-28

申请人： Akira Yoshino

发明人： Akira Yoshino

IPC分类号： H01L2976

CPC分类号： H01L27/11568 ,  H01L27/115

摘要： A nonvolatile semiconductor storage device has a semiconductor substrate, a gate electrode formed on a surface of the semiconductor substrate, and a first diffusion layer and a second diffusion layer formed in the surface of the semiconductor substrate on opposite sides of the gate electrode, a channel region being formed between the first and second diffusion layers. A first insulating layer, isolated pieces of material and a second insulating layer are formed in order in a multilayer structure on the surface of the semiconductor substrate on the channel region.

摘要翻译： 非易失性半导体存储器件具有半导体衬底，形成在半导体衬底的表面上的栅电极和形成在栅电极的相对侧上的半导体衬底的表面中的第一扩散层和第二扩散层，沟道 区域形成在第一和第二扩散层之间。 第一绝缘层，隔离的材料片和第二绝缘层在沟道区域上的半导体衬底的表面上的多层结构中依次形成。

公开(公告)号：US6082136A

公开(公告)日：2000-07-04

申请号：US796746

申请日：1997-02-07

申请人： Akira Yoshino

发明人： Akira Yoshino

IPC分类号： F25J3/04 ,  F25J3/00

CPC分类号： F25J3/0409 ,  F25J3/04024 ,  F25J3/04139 ,  F25J3/04193 ,  F25J3/04254 ,  F25J3/04321 ,  F25J3/04381 ,  F25J3/04412 ,  F25J2210/50

摘要： There are included a fractionating tower for liquefying and separating the compressed air cooled by heat exchangers to an ultralow temperature, a liquid oxygen takeout path for guiding the liquid oxygen in the above-mentioned fractionating tower to the above-mentioned heat exchangers to gasify so as to become a gasified oxygen, and a product oxygen gas takeout path which extends from the front end of the above-mentioned liquid oxygen takeout path and increases the temperature of the above-mentioned gasified oxygen so as to obtain a product oxygen gas, the above-mentioned liquid oxygen takeout path being provided with an oxygen gas pressurizing pump, and the above-mentioned product oxygen gas takeout path on the side upstream the above-mentioned heat exchangers being provided with an expansion turbine. In the present invention, the liquid oxygen taken out from the fractionating tower is pressurized in a liquid state, then introduced into the expansion turbine to generate a cold, which cold is fed to the heat exchangers, so that the cold is used as a cold source for the entire equipment to reduce the cost of generating the cold.

摘要翻译： 包括用于液化和分离由热交换器冷却的压缩空气到超低温的分馏塔，用于将上述分馏塔中的液氧引导到上述热交换器的液氧取出路径以气化，以便 成为气化的氧气，以及从上述液氧取出路径的前端延伸的产物氧气取出路径，提高上述气化氧的温度，得到产物氧气，上述 所述液氧取出路径设置有氧气加压泵，并且在上述热交换器上游侧的上述产物氧气取出路径设置有膨胀涡轮机。 在本发明中，从分馏塔中取出的液态氧以液态加压，然后引入膨胀涡轮机产生冷，将冷进给到热交换器，使得冷用作冷 来源为整个设备降低产生冷的成本。

公开(公告)号：US5561076A

公开(公告)日：1996-10-01

申请号：US378104

申请日：1995-01-26

申请人： Akira Yoshino

发明人： Akira Yoshino

IPC分类号： H01L21/316 ,  H01L21/314 ,  H01L21/76 ,  H01L21/762

CPC分类号： H01L21/314 ,  H01L21/76264 ,  H01L21/76267 ,  H01L21/76283

摘要： The invention provides a method of fabricating a semiconductor device on an SOI substrate having a single crystal silicon substrate, a silicon dioxide film laid on top of the silicon substrate and a single crystal silicon layer laid on top of the silicon dioxide film. The method includes the steps of forming a single crystal silicon island composed of the single crystal silicon layer in a first region in which the semiconductor device is to be fabricated, and selectively forming a low temperature deposition silicon dioxide film in a second region in which the semiconductor device is not to be fabricated in the presence of photoresist, so that the low temperature deposition silicon dioxide film covers side surfaces of the silicon island. The second region turns into an isolation region for electrically separating adjacent semiconductor devices.

摘要翻译： 本发明提供一种在具有单晶硅衬底的SOI衬底上制造半导体器件的方法，在硅衬底上放置的二氧化硅膜和位于二氧化硅膜顶部的单晶硅层。 该方法包括以下步骤：在要制造半导体器件的第一区域中形成由单晶硅层组成的单晶硅岛;以及在第二区域中选择性地形成低温沉积二氧化硅膜，其中 在光致抗蚀剂的存在下不制造半导体器件，使得低温沉积二氧化硅膜覆盖硅岛的侧表面。 第二区域变成用于电分离相邻半导体器件的隔离区域。