公开(公告)号：US08625269B2

公开(公告)日：2014-01-07

申请号：US13172603

申请日：2011-06-29

申请人： Yung-Chieh Chen ,  Shou-Kuo Hsu

发明人： Yung-Chieh Chen ,  Shou-Kuo Hsu

IPC分类号： G06F1/16

CPC分类号： G06F1/185

摘要： A serial advanced technology attachment (SATA) DIMM includes a board body. A control chip is arranged on the board body. An extending board extends from an end of the board body. A first edge connector is set on the extending board. A second edge connector is set on a bottom side of the board body. The first edge connector includes a number of signal pins connected to the control chip, and a number of ground pins.

摘要翻译： 串行高级技术附件（SATA）DIMM包括板体。 控制芯片布置在板体上。 延伸板从板体的端部延伸。 第一边缘连接器设置在延伸板上。 第二边缘连接器设置在电路板主体的底侧。 第一边缘连接器包括连接到控制芯片的多个信号引脚和多个接地引脚。

公开(公告)号：US08418357B2

公开(公告)日：2013-04-16

申请号：US12329614

申请日：2008-12-07

申请人： Yung-Chieh Chen ,  Cheng-Shien Li ,  Shou-Kuo Hsu

发明人： Yung-Chieh Chen ,  Cheng-Shien Li ,  Shou-Kuo Hsu

IPC分类号： H05K3/30 ,  H01R43/00

CPC分类号： H05K1/0295 ,  H05K1/0231 ,  H05K1/0237 ,  H05K1/0243 ,  H05K1/113 ,  H05K2201/09236 ,  H05K2201/09954 ,  H05K2201/10545 ,  H05K2201/10636 ,  H05K2201/10689 ,  Y02P70/611 ,  Y10T29/49117 ,  Y10T29/4913

摘要： A printed circuit board layout method includes the following steps. Providing a printed circuit board with a first layout layer and a second layout layer. Disposing a pair of first conducting portions on the first layout layer to electrically couple to a control chip. Sequentially disposing a pair of second conducting portions, a pair of third conducting portions, and a pair of fourth conducting portions on the second layout layer. Providing a pair of connecting portions to connect the first conducting portions and the third conducting portions. Electrically connecting an electronic device to the second conducting portions, and providing a first and second components are coupled with the third and fourth conducting portions, or electrically coupling the electronic device to the fourth conducting portions, and providing the first and the second components are coupled with the second and third conducting portions.

摘要翻译： 印刷电路板布局方法包括以下步骤。 提供具有第一布局层和第二布局层的印刷电路板。 在第一布局层上布置一对第一导电部分以电耦合到控制芯片。 在第二布局层上顺序地布置一对第二导电部分，一对第三导电部分和一对第四导电部分。 提供一对连接部分以连接第一导电部分和第三导电部分。 将电子设备电连接到第二导电部分，以及提供第一和第二部件与第三和第四导电部分耦合，或将电子器件电耦合到第四导电部分，并且提供第一和第二部件耦合 具有第二和第三导电部分。

公开(公告)号：US08124884B2

公开(公告)日：2012-02-28

申请号：US12693418

申请日：2010-01-25

申请人： Yung-Chieh Chen ,  Cheng-Hsien Lee ,  Shou-Kuo Hsu

发明人： Yung-Chieh Chen ,  Cheng-Hsien Lee ,  Shou-Kuo Hsu

IPC分类号： H05K1/11

CPC分类号： H05K1/0245 ,  H05K1/0231 ,  H05K2201/09236

摘要： A printed circuit board (PCB) includes a positive differential signal line including first and second segments, a negative differential signal line including third and fourth segments, first and second connecting elements soldered on opposite surfaces of the PCB. The first segment and the fourth segment are located in a first straight line which has a first permittivity. The third segment and the second segment are located in a second straight line which has a second permittivity different from the first permittivity. The first connecting element is connected between the first segment and the second segment. The second connecting element is connected between the third segment and the fourth segment.

摘要翻译： 印刷电路板（PCB）包括包括第一和第二段的正差分信号线，包括第三和第四段的负差分信号线，焊接在PCB的相对表面上的第一和第二连接元件。 第一段和第四段位于具有第一介电常数的第一直线中。 第三段和第二段位于具有与第一介电常数不同的第二介电常数的第二直线上。 第一连接元件连接在第一段和第二段之间。 第二连接元件连接在第三段和第四段之间。

公开(公告)号：US08315066B2

公开(公告)日：2012-11-20

申请号：US12982905

申请日：2010-12-31

申请人： Yung-Chieh Chen ,  Shou-Kuo Hsu

发明人： Yung-Chieh Chen ,  Shou-Kuo Hsu

IPC分类号： H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10

CPC分类号： G06F1/185 ,  H01R12/7082 ,  H01R12/721

摘要： A printed circuit board (PCB) includes a top layer, a memory controller, two gaps, and two connectors. The memory controller is located on the top layer. A number of golden fingers are respectively set on the top layer near each gap and electrically connected to the memory controller. Each connector includes a first slot to hold the gold fingers near a corresponding one of the gaps and a second slot to hold a number of gold fingers of a corresponding one of two memory chips. The first slot is electrically connected to the second slot. Each memory chip and the PCB are coplanar.

摘要翻译： 印刷电路板（PCB）包括顶层，存储器控制器，两个间隙和两个连接器。 内存控制器位于顶层。 多个金手指分别设置在每个间隙附近的顶层上并电连接到存储器控制器。 每个连接器包括用于将金手指保持在相应的一个间隙附近的第一槽和用于保持两个存储器芯片中对应的一个的多个金手指的第二槽。 第一槽电连接到第二槽。 每个存储芯片和PCB都是共面的。

公开(公告)号：US08502617B2

公开(公告)日：2013-08-06

申请号：US13015889

申请日：2011-01-28

申请人： Ying-Tso Lai ,  Yung-Chieh Chen

发明人： Ying-Tso Lai ,  Yung-Chieh Chen

IPC分类号： H01P3/08

CPC分类号： H01P3/026 ,  H05K1/0245 ,  H05K1/0366 ,  H05K2201/029 ,  H05K2201/09263

摘要： A printed circuit board includes a base, a signal layer lying on the base, and a number of pairs of differential signal traces positioned on the signal layer. The base is made of a grid of glass fiber bundles filled with epoxy resin. Each pair of differential signal traces includes a first signal trace and a second signal trace. Each of the first and second signal traces extends in a zigzag pattern. The first signal trace includes a number of wave crests and wave troughs. The wave crests define a reference straight line that connects all the wave crest of the first signal trace. The ratio of the distance from each wave crest to the reference straight line to the orthogonal distance between each wave crest and an adjacent wave trough along the reference straight line is 1:5.

摘要翻译： 印刷电路板包括基座，位于基座上的信号层和位于信号层上的多对差分信号迹线。 基座由填充有环氧树脂的玻璃纤维束格栅制成。 每对差分信号迹线包括第一信号迹线和第二信号迹线。 第一和第二信号迹线中的每一个以锯齿形图案延伸。 第一个信号迹线包括多个波峰和波谷。 波峰定义连接第一个信号迹线的所有波峰的参考直线。 每个波峰与参考直线的距离与沿着参考直线的每个波峰与相邻波谷之间的正交距离的比率为1:5。

公开(公告)号：US08406005B2

公开(公告)日：2013-03-26

申请号：US13050954

申请日：2011-03-18

申请人： Hsiao-Yun Su ,  Yung-Chieh Chen ,  Cheng-Hsien Lee

发明人： Hsiao-Yun Su ,  Yung-Chieh Chen ,  Cheng-Hsien Lee

IPC分类号： H05K7/10 ,  H05K7/12

CPC分类号： H05K1/0245 ,  H05K1/0251 ,  H05K2201/09718

摘要： A printed circuit board includes first and second transmission lines connected to a first high speed differential signal control chip, third and fourth transmission lines connected to a second high speed differential signal control chip, and fifth and sixth transmission lines connected to a connector pad. To have the first high speed differential signal control chip communicate with the connector pad, the first transmission line is connected to the fifth transmission line through a first connection component, and the second transmission line is connected to the sixth transmission line through a second connection component. To have the second speed differential signal control chip communicate with the connector pad, the third transmission line is connected to the fifth transmission line through the first connection component, and the fourth transmission line is connected to the sixth transmission line through the second connection component.

摘要翻译： 印刷电路板包括连接到第一高速差分信号控制芯片的第一和第二传输线，连接到第二高速差分信号控制芯片的第三和第四传输线以及连接到连接器焊盘的第五和第六传输线。 为了使第一高速差分信号控制芯片与连接器焊盘通信，第一传输线通过第一连接部件连接到第五传输线，并且第二传输线通过第二连接部件连接到第六传输线 。 为了使第二速度差分信号控制芯片与连接器焊盘通信，第三传输线通过第一连接部件连接到第五传输线，并且第四传输线通过第二连接部件连接到第六传输线。

公开(公告)号：US08283571B2

公开(公告)日：2012-10-09

申请号：US12790883

申请日：2010-05-31

申请人： Ying-Tso Lai ,  Yung-Chieh Chen ,  Chun-Jen Chen ,  Wei-Chieh Chou

发明人： Ying-Tso Lai ,  Yung-Chieh Chen ,  Chun-Jen Chen ,  Wei-Chieh Chou

IPC分类号： H05K1/11

CPC分类号： H05K1/0225 ,  H05K1/0245 ,  H05K1/0253

摘要： A printed circuit board includes a signal layer, a dielectric layer, and a reference layer. The signal layer includes a pair of differential signal lines. The dielectric layer is sandwiched between the signal layer and the reference layer. A first void is defined in the reference layer between projections of the pair of differential signal lines. Two second voids are defined in the reference layer at opposite sides of the projections of the pair of differential signal lines.

摘要翻译： 印刷电路板包括信号层，电介质层和参考层。 信号层包括一对差分信号线。 电介质层夹在信号层和参考层之间。 在该对差分信号线的投影之间的参考层中限定第一空隙。 在该对差分信号线的突起的相对侧的参考层中限定两个第二空隙。

公开(公告)号：US08780536B2

公开(公告)日：2014-07-15

申请号：US13275329

申请日：2011-10-18

申请人： Shin-Ting Yen ,  Yung-Chieh Chen ,  Duen-Yi Ho

发明人： Shin-Ting Yen ,  Yung-Chieh Chen ,  Duen-Yi Ho

IPC分类号： H05K5/00 ,  H05K7/00

CPC分类号： H05K1/0216 ,  H05K1/0296 ,  H05K1/113 ,  H05K2201/10159 ,  H05K2201/10189 ,  H05K2201/10522

摘要： A motherboard includes a printed circuit board (PCB), a central processing unit (CPU), a regulator, a first memory adaptor, and a second memory adaptor. The PCB includes a top surface, a bottom surface, a plurality of first soldering pads and first leads arranged on the top surface, and a plurality of second leads arranged between the top surface and the bottom surface. The PCB defines a plurality of first vias, second vias, and power vias. The CPU is connected to the first vias. The voltage regulator is connected to the power vias. The first memory adaptor neighbors to the regulator and is surface-mount soldered to the first soldering pads. The first soldering pads are connected to the first vias by first leads. The second memory adaptor is soldered to the second vias. The second vias are connected to the first vias by the second leads.

摘要翻译： 主板包括印刷电路板（PCB），中央处理单元（CPU），调节器，第一存储器适配器和第二存储器适配器。 PCB包括顶表面，底表面，多个第一焊盘和布置在顶表面上的第一引线，以及布置在顶表面和底表面之间的多个第二引线。 PCB限定多个第一通孔，第二通孔和电源通孔。 CPU连接到第一个通孔。 电压调节器连接到电源通孔。 第一个存储器适配器与调节器相邻，并且表面安装焊接到第一个焊盘。 第一焊盘通过第一引线连接到第一通孔。 第二个存储器适配器焊接到第二个通孔。 第二通孔通过第二引线连接到第一通孔。