公开(公告)号：US07009372B2

公开(公告)日：2006-03-07

申请号：US10811430

申请日：2004-03-26

申请人： Sehat Sutardja ,  Runsheng He ,  Jiancheng Zhang

发明人： Sehat Sutardja ,  Runsheng He ,  Jiancheng Zhang

IPC分类号： G05F1/40

CPC分类号： H02M3/157 ,  H02M1/088 ,  H02M1/38 ,  H02M3/158 ,  H02M3/1588 ,  H02M2001/0009 ,  H02M2001/0012 ,  H02M2001/0025 ,  H02M2001/0048 ,  H03K5/1565 ,  H03K17/122 ,  H03K17/167 ,  H03K17/6871 ,  Y02B70/1466 ,  Y02B70/1491

摘要： A control system to control an output regulator. The output regulator to convert an input voltage to a regulated output. The output regulator including a power stage to generate a power output from the input voltage and an output filter to filter the power output to generate the regulated output. A digital controller, responsive to a sense signal corresponding to the regulated output, to generate a drive signal to control the power stage. The digital controller including and selecting between at least three operating modes, a selected one of the operating modes to generate the drive signal

摘要翻译： 用于控制输出调节器的控制系统。 输出稳压器将输入电压转换为稳压输出。 输出调节器包括产生从输入电压输出的功率级和输出滤波器，以过滤功率输出以产生调节输出。 响应于与调节输出对应的感测信号的数字控制器产生驱动信号以控制功率级。 数字控制器包括并在至少三种操作模式之间选择所选择的一种操作模式以产生驱动信号

公开(公告)号：US07002353B1

公开(公告)日：2006-02-21

申请号：US10400864

申请日：2003-03-27

申请人： William Lo ,  Yiqing Guo ,  Tak Tsui ,  Tsin-Ho Leung ,  Runsheng He ,  Eric Janofsky

发明人： William Lo ,  Yiqing Guo ,  Tak Tsui ,  Tsin-Ho Leung ,  Runsheng He ,  Eric Janofsky

IPC分类号： G01R31/11

CPC分类号： H04L1/248 ,  H04L43/50

摘要： A physical layer device communicates with a second physical layer device over a cable. The physical layer device includes a cable tester that identifies when the second physical layer device is disconnected from the cable. The cable tester includes a test initiating circuit that initiates a cable test when a link is lost, a test module that transmits test pulses on the pairs of the cable, measures reflection amplitudes, calculates cable lengths, and determines whether the pairs have said open status based on said measured amplitude and said calculated cable length, and a reporting circuit that generates a disconnect signal when at least one of the pairs has an open status.

摘要翻译： 物理层设备通过电缆与第二物理层设备通信。 物理层设备包括电缆测试器，其识别何时第二物理层设备与电缆断开连接。 电缆测试器包括测试启动电路，当链路丢失时启动电缆测试，测试模块在电缆对上传输测试脉冲，测量反射幅度，计算电缆长度，并确定对是否具有打开状态 基于所述测量的幅度和所述计算的电缆长度，以及报告电路，当所述对中的至少一个具有打开状态时，生成断开信号。

公开(公告)号：US06894465B2

公开(公告)日：2005-05-17

申请号：US10818508

申请日：2004-04-05

申请人： Sehat Sutardja ,  Runsheng He ,  Jiancheng Zhang

发明人： Sehat Sutardja ,  Runsheng He ,  Jiancheng Zhang

IPC分类号： H02M3/155 ,  G05F1/40 ,  G05F1/56 ,  G05F1/575 ,  H02M1/088 ,  H02M3/137 ,  H02M3/158 ,  H02M3/335

CPC分类号： H02M3/157 ,  H02M1/088 ,  H02M1/38 ,  H02M3/158 ,  H02M3/1588 ,  H02M2001/0009 ,  H02M2001/0012 ,  H02M2001/0025 ,  H02M2001/0048 ,  H03K5/1565 ,  H03K17/122 ,  H03K17/167 ,  H03K17/6871 ,  Y02B70/1466 ,  Y02B70/1491

摘要： A power array for converting an input voltage to a chopped output used in an output regulator that converts the chopped output to a regulated output. The power array including a switch array, responsive to independent drive signals, to convert the input voltage to the chopped output at a switching frequency. The switch array including at least two power switches. A switch controller to generate the independent drive signals as a function of a duty cycle signal. The switch controller to operate at a sampling frequency, the sampling frequency being greater than the switching frequency. The switch controller to control the independent drive signals at a drive frequency greater than the switching frequency.

公开(公告)号：US06870881B1

公开(公告)日：2005-03-22

申请号：US09644532

申请日：2000-08-24

申请人： Runsheng He

发明人： Runsheng He

IPC分类号： H03H7/30 ,  H04L25/03

CPC分类号： H04L25/03057 ,  H04L25/0307

摘要： A feedforward equalizer for DFE based detector is provided comprising a digital to analog converter to convert an analog signal to a digital signal. A feedforward equalizer comprises a high-pass filter and is responsive to the input circuit. The high-pass filter has a low cutoff frequency, has a relatively flat response and has high attenuation at low frequencies. A decision feedback equalizer comprises a decision circuit responsive to the feedforward equalizer, and a feedback filter is responsive to the decision circuit. The decision circuit is also responsive to the feedback filter.

摘要翻译： 提供了一种用于基于DFE的检测器的前馈均衡器，其包括将模拟信号转换为数字信号的数模转换器。 前馈均衡器包括高通滤波器并且响应于输入电路。 高通滤波器具有低截止频率，具有相对平坦的响应并且在低频处具有高衰减。 判决反馈均衡器包括响应于前馈均衡器的判决电路，反馈滤波器响应于判决电路。 判决电路还响应反馈滤波器。

公开(公告)号：US6081562A

公开(公告)日：2000-06-27

申请号：US956309

申请日：1997-10-22

申请人： Runsheng He ,  Joao R. Cruz

发明人： Runsheng He ,  Joao R. Cruz

IPC分类号： H03M13/23 ,  H03M13/41 ,  H04L25/03 ,  H03D1/00 ,  H04L27/06

CPC分类号： H03M13/6343 ,  H03M13/41 ,  H03M13/4107 ,  H03M13/6502 ,  H04L25/03229

摘要： A method of design and an implementation system for reduced-state Viterbi detectors for intersymbol interference channels are provided. The method uses a complement states grouping technique that comprises the steps of finding the state distances between complement states; forming the reduced-state trellis by grouping the complement states with state distance no less than the minimum free distance; and by keeping the complement states with state distance less than minimum free distance unchanged. The resultant reduced-state Viterbi detector has negligible performance loss compared to the full-state Viterbi detector while the complexity is reduced by a factor of about two.

公开(公告)号：US09071479B2

公开(公告)日：2015-06-30

申请号：US13594595

申请日：2012-08-24

申请人： Haoli Qian ,  Yat-tung Lam ,  Runsheng He

发明人： Haoli Qian ,  Yat-tung Lam ,  Runsheng He

IPC分类号： H03H7/30 ,  H03H7/40 ,  H03K5/159 ,  H04L25/03 ,  H04B10/69

CPC分类号： H04L25/03057 ,  H04B10/6971 ,  H04L2025/03356 ,  H04L2025/03496

摘要： A decision-feedback equalizer (DFE) can be operated at higher frequencies when parallelization and pre-computation techniques are employed. Disclosed herein is a DFE design suitable for equalizing receive signals with bit rates above 10 GHz, making it feasible to employ decision feedback equalization in silicon-based optical transceiver modules. One illustrative embodiment includes a front end filter to reduce leading intersymbol interference in a receive signal; a serial-to-parallel converter and at least one pre-compensation unit that together convert the filtered signal into grouped sets of tentative decisions, the sets in each group being made available in parallel; a set of pipelined DFE multiplexer units to select a contingent symbol decision from each set of tentative decisions to form groups of contingent symbol decisions based on a presumed sequence of preceding symbol decisions; and an output multiplexer that chooses, based on preceding symbol decisions, one of said groups of contingent symbol decisions.

摘要翻译： 当采用并行化和预计算技术时，判决反馈均衡器（DFE）可以以更高的频率运行。 这里公开了一种DFE设计，其适用于均衡接收信号，比特率高于10GHz，使得在硅基光收发器模块中采用判决反馈均衡是可行的。 一个说明性实施例包括前端滤波器以减少接收信号中的前导符号间干扰; 串行到并行转换器和至少一个预补偿单元，其将滤波的信号一起转换成分组的一组暂定决定，每组中的组并行可用; 一组流水线DFE多路复用器单元，用于从每组暂定决定中选择或有符号决定，以基于先前符号决定的推定序列形成组合的偶然符号决定; 以及输出多路复用器，其基于先前的符号判定来选择所述组的偶然符号决定中的一个。

公开(公告)号：US08787861B1

公开(公告)日：2014-07-22

申请号：US13607547

申请日：2012-09-07

申请人： Xiaopeng Chen ,  Runsheng He

发明人： Xiaopeng Chen ,  Runsheng He

IPC分类号： H04B1/10

CPC分类号： H04B3/32 ,  H04B3/23

摘要： In some implementations, an apparatus includes an echo canceller that generates an echo interference compensation signal that compensates for an echo interference signal in a communication signal, a crosstalk canceller that generates a crosstalk interference compensation signal that compensates for a crosstalk interference signal in the communication signal, and a combiner that generates a combined interference compensation signal based on the echo interference compensation signal and the crosstalk interference compensation signal.

摘要翻译： 在一些实施方式中，一种装置包括产生补偿通信信号中的回波干扰信号的回波干扰补偿信号的回波抵消器，产生用于补偿通信信号中的串扰干扰信号的串扰干扰补偿信号的串扰消除器 以及基于回波干扰补偿信号和串扰干扰补偿信号产生组合干扰补偿信号的组合器。

公开(公告)号：US08787860B2

公开(公告)日：2014-07-22

申请号：US13549376

申请日：2012-07-13

申请人： Shaoan Dai ,  Runsheng He

发明人： Shaoan Dai ,  Runsheng He

IPC分类号： H04B1/10

CPC分类号： H04B1/28 ,  H04B1/0007

摘要： The present disclosure includes apparatus, systems, and techniques relating to receiver image cancellation. A described technique includes receiving a downconverted signal in a digital domain, the downconverted signal including an in-phase signal and a quadrature signal; generating a first signal of a signal channel based on the downconverted signal; generating a second signal of an image channel based on the downconverted signal; filtering the second signal using first weights to produce a pilot training signal; filtering the second signal using second weights to produce an image cancellation signal; generating an output signal by subtracting the image cancellation signal from the first signal to resolve the desired signal; updating the first weights based on the first weights, the second signal, the pilot training signal, and a pilot signal; and updating the second weights based on the second weights, the output signal, and the pilot training signal.

摘要翻译： 本公开包括与接收机图像消除有关的装置，系统和技术。 所描述的技术包括在数字域中接收下变频信号，所述下变频信号包括同相信号和正交信号; 基于下变频信号产生信号信道的第一信号; 基于下变频信号产生图像通道的第二信号; 使用第一权重对所述第二信号进行滤波以产生导频训练信号; 使用第二权重来过滤第二信号以产生图像消除信号; 通过从第一信号中减去图像消除信号来产生输出信号以解析所需信号; 基于第一权重，第二信号，导频训练信号和导频信号来更新第一加权; 以及基于所述第二权重，所述输出信号和所述导频训练信号来更新所述第二权重。

公开(公告)号：US08712034B1

公开(公告)日：2014-04-29

申请号：US13476418

申请日：2012-05-21

申请人： Xiaopeng Chen ,  Runsheng He

发明人： Xiaopeng Chen ,  Runsheng He

IPC分类号： H04M9/08

CPC分类号： H04B3/32 ,  H04B3/23

摘要： An adaptive analog echo/near-end crosstalk (NEXT) cancellation system includes a processor configured to receive a first digital signal corresponding to a first signal received by the system, receive a second digital signal corresponding to a second signal transmitted by the system, and generate a first error control signal based on each of the first digital signal and the second digital signal. A cancellation device is configured to generate a second error control signal based on a first analog signal corresponding to the first signal. The cancellation device selectively outputs the second error control signal or the first error control signal based on whether the system is operating in a first mode or a second mode, respectively. The cancellation device selectively outputs a cancellation signal according to one of the second error control signal and the first error control signal, and a second analog signal corresponding to the second signal.

摘要翻译： 自适应模拟回波/近端串扰（NEXT）消除系统包括：处理器，被配置为接收对应于由系统接收到的第一信号的第一数字信号;接收对应于系统发送的第二信号的第二数字信号;以及 基于第一数字信号和第二数字信号中的每一个产生第一误差控制信号。 取消装置被配置为基于与第一信号相对应的第一模拟信号来产生第二错误控制信号。 取消装置基于系统是否分别以第一模式或第二模式操作来选择性地输出第二错误控制信号或第一错误控制信号。 取消装置根据第二误差控制信号和第一误差控制信号之一选择性地输出消除信号，以及对应于第二信号的第二模拟信号。

公开(公告)号：US08638886B2

公开(公告)日：2014-01-28

申请号：US12565817

申请日：2009-09-24

申请人： Runsheng He

发明人： Runsheng He

IPC分类号： H03M13/03 ,  H04L27/06

CPC分类号： H04L25/03178 ,  H03M13/3723 ,  H03M13/3972 ,  H03M13/41 ,  H03M13/6561 ,  H04L1/0054 ,  H04L25/03331 ,  H04L25/14

摘要： A parallel implementation of the Viterbi decoder becomes more efficient when it employs end-state information passing as disclosed herein. The improved efficiency enables the usage of less area and/or provides the capacity to handle higher data rates within a given heat budget. In at least some embodiments, a decoder chip employs multiple decoders that operate in parallel on a stream of overlapping data blocks, using add-compare-select operations, to obtain a sequence of state metrics representing a most likely path to each state. Each decoder passes information indicative of a selected end-state for a decoder operating on a preceding data block. Each decoder in turn receives, from a decoder operating on a subsequent data block, the information indicative of the selected end-state. The end-state information eliminates any need for post-data processing, thereby abbreviating the decoding process.

摘要翻译： 当维特比解码器采用如本文所公开的终端状态信息传递时，并行实现变得更有效。 提高的效率使得能够使用更少的面积和/或提供在给定的热预算内处理更高数据速率的能力。 在至少一些实施例中，解码器芯片使用多个解码器，其使用加法比较选择操作在重叠数据块的流上并行操作，以获得表示每个状态的最可能路径的状态度量序列。 每个解码器传递指示在前一数据块上操作的解码器的所选择的结束状态的信息。 每个解码器又从在后续数据块上操作的解码器接收指示所选择的结束状态的信息。 结束状态信息消除了对数据后处理的任何需要，从而缩短了解码过程。