公开(公告)号：US6047121A

公开(公告)日：2000-04-04

申请号：US829151

申请日：1997-03-31

Applicant: Mark P. Vaughan

Inventor： Mark P. Vaughan

IPC: G09G1/16 ,  H04N5/44 ,  H04N21/41 ,  G06F13/12 ,  G06F13/14

CPC classification number: H04N5/4401 ,  G09G1/167 ,  H04N21/4143 ,  H04N21/443 ,  H04N21/485

Abstract: A computer system comprising a display monitor including an audio function and a computer coupled to the display monitor including a computer controller for controlling the audio function in the monitor. The computer is operable in a computer mode, a television mode, and a combination computer/television mode for displaying computer and television information on the monitor. The system determines whether the monitor includes a controller for controlling its audio function. Based upon this determination, the system controls the audio function with the audio controller in the monitor if the monitor includes such a controller or, alternatively, with the computer controller if the monitor does not have such a controller.

Abstract translation: 一种计算机系统，包括包括音频功能的显示监视器和耦合到显示监视器的计算机，包括用于控制监视器中的音频功能的计算机控制器。 计算机可以在计算机模式，电视模式和用于在监视器上显示计算机和电视信息的组合计算机/电视模式下操作。 系统确定监视器是否包括用于控制其音频功能的控制器。 基于该确定，如果监视器包括这样的控制器，或者如果监视器不具有这样的控制器，则与监视器中的音频控制器一起控制音频功能。

公开(公告)号：US6009505A

公开(公告)日：1999-12-28

申请号：US759046

申请日：1996-12-02

Applicant: John S. Thayer ,  Gary W. Thome ,  Brian E. Longhenry ,  John G. Favor ,  Frederick D. Weber

Inventor： John S. Thayer ,  Gary W. Thome ,  Brian E. Longhenry ,  John G. Favor ,  Frederick D. Weber

IPC: G06F9/30 ,  G06F9/302 ,  G06F9/312 ,  G06F9/315 ,  G06F17/16

CPC classification number: G06F9/30014 ,  G06F9/30032 ,  G06F9/30036 ,  G06F9/30043 ,  G06F9/30109 ,  G06F9/3877

Abstract: A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU can be coupled either through a coprocessor bus or a local CPU bus to a conventional processor. The MEU employs vector registers, a vector ALU, and an operand routing unit (ORU) to perform a maximum number of the multimedia operations within as few instruction cycles as possible. Complex algorithms are readily performed by arranging operands upon the vector ALU in accordance with the desired algorithm flowgraph. The ORU aligns the operands within partitioned slots or sub-slots of the vector registers using vector instructions unique to the MEU. At the output of the ORU, operand pairs from vector source or destination registers can be easily routed and combined at the vector ALU. The vector instructions employ special load/store instructions in combination with numerous operational instructions to carry out concurrent multimedia operations on the aligned operands. In one embodiment, multiple ALUs may each receive one operand from a fixed source register slot location, where the fixed slot location may be different for each ALU. The operand routing may provide another operand from any source register slot location for another input to each respective ALU.

Abstract translation: 提供多媒体扩展单元（MEU）用于执行各种多媒体类型操作。 MEU可以通过协处理器总线或本地CPU总线耦合到常规处理器。 MEU使用向量寄存器，向量ALU和操作数路由单元（ORU）来尽可能少地执行多媒体操作。 通过根据期望的算法流程图将操作数布置在向量ALU上来容易地执行复杂算法。 ORU使用MAU特有的向量指令对齐向量寄存器的分区插槽或子时隙内的操作数。 在ORU的输出端，矢量源或目标寄存器的操作数对可以很容易地在矢量ALU中路由和组合。 向量指令采用特殊的加载/存储指令与许多操作指令相结合，对对齐的操作数执行并发的多媒体操作。 在一个实施例中，多个ALU可以从固定的源寄存器时隙位置接收一个操作数，其中固定时隙位置对于每个ALU可以是不同的。 操作数路由可以从任何源寄存器时隙位置提供另一个操作数，用于另一个输入到每个相应的ALU。

公开(公告)号：US5955022A

公开(公告)日：1999-09-21

申请号：US797838

申请日：1997-02-10

Applicant: Kelsey R. Walker ,  Daniel B. Granzow

Inventor： Kelsey R. Walker ,  Daniel B. Granzow

IPC: B41J2/16 ,  B23K26/00 ,  B29C35/08

CPC classification number: B41J2/1634 ,  B41J2/162

Abstract: A page-wide, drop-on-demand type ink jet printhead and an associated method of manufacturing an orifice plate. The orifice plate is comprised of a block of material in which a first portion of the block of material has been removed to define an ink reservoir. Also formed in the orifice plate are a series of apertures, each of the apertures includes an ink jet and an ink jet nozzle. A fill channel, which extends between the ink reservoir and each ink jet, is also formed in the orifice plate to provide a supply of ink to the ink jet. An intermediate layer is mounted to the orifice plate. The intermediate layer is formed of an active piezoelectric material and a series of piezoelectric actuators, each acoustically coupled to a corresponding one of the series of apertures, are formed on the intermediate layer. By applying a voltage differential between first and second electrodes, which make up each piezoelectric actuator, the intermediate layer is deflected to effect ejection of a droplet of ink from the aperture acoustically coupled to each piezoelectric actuator.

Abstract translation: 页面范围的按需喷墨打印头和制造孔板的相关方法。 孔板由一块材料组成，其中已经去除了材料块的第一部分以限定油墨储存器。 在孔板中还形成有一系列孔，每个孔包括喷墨和喷墨喷嘴。 在油墨储存器和每个喷墨之间延伸的填充通道也形成在孔板中以向喷墨提供油墨供应。 中间层安装在孔板上。 中间层由有源压电材料形成，并且在中间层上形成一系列压电致动器，每个压电致动器声耦合到相应的一个孔。 通过在构成每个压电致动器的第一和第二电极之间施加电压差，中间层被偏转以实现墨滴从声耦合到每个压电致动器的孔的喷射。

公开(公告)号：US5923876A

公开(公告)日：1999-07-13

申请号：US519104

申请日：1995-08-24

Applicant: Gaines C. Teague

Inventor： Gaines C. Teague

IPC: G06F11/00 ,  G11B20/18 ,  G06F15/163 ,  G06F9/00 ,  G06F9/46

CPC classification number: G06F11/008 ,  G11B20/18

Abstract: A layered block device driver for accessing a storage device coupled to a computer system having a platform on which a disk fault prediction application operates. The layered block device driver includes a file system driver coupled to the computer system, at least one upper level driver coupled to the file system driver, an intermediate driver having a first coupling with the upper level driver for the exchange of messages between the intermediate driver and the upper level driver and a second coupling with the application which controls the exchange of messages between the application and the storage device, and a port driver coupled to the intermediate driver and the storage device. The intermediate driver includes an application processing routine for controlling exchanges between the application and the storage device, an upper level driver processing routine for handling exchanges between the upper level driver and the port driver, a queuing routine coupled to the application processing routine and the upper level processing routine, a flag coupled to the application processing routine and the upper level processing routine, a counter coupled to the application processing routine and the upper level processing routine and an interrupt routine coupled to the application processing routine, the upper level processing routine and the queuing routine.

Abstract translation: 一种用于访问耦合到具有盘故障预测应用在其上运行的平台的计算机系统的存储设备的分层块设备驱动器。 分层块设备驱动器包括耦合到计算机系统的文件系统驱动器，耦合到文件系统驱动器的至少一个上级驱动器，具有与上级驱动器的第一耦合的中间驱动器，用于在中间驱动器 以及与应用程序之间的应用程序和存储设备之间的消息交换的第二耦合以及耦合到中间驱动器和存储设备的端口驱动器。 中间驱动器包括用于控制应用程序和存储装置之间的交换的应用处理程序，用于处理上层驱动程序和端口驱动程序之间的交换的上级驱动程序处理程序，耦合到应用程序处理程序和上层驱动程序的排队程序 高级处理例程，耦合到应用处理例程和上位处理程序的标志，耦合到应用处理例程和上位处理例程的计数器以及耦合到应用处理程序的中断程序，上位处理程序和 排队程序。

公开(公告)号：US5923860A

公开(公告)日：1999-07-13

申请号：US882090

申请日：1997-06-25

Applicant: Sompong P. Olarig

Inventor： Sompong P. Olarig

IPC: G06F13/38 ,  G06F13/00

CPC classification number: G06F13/387

Abstract: A multiple use core logic chip set is provided in a computer system that may be configured either as a bridge between an accelerated graphics port ("AGP") bus and host and memory buses, as a bridge between a remote peripheral component interconnect ("remote-PCI") bus and the host and memory buses, or as a bridge between a primary PCI bus and the remote-PCI bus. The function of the multiple use chip set is determined at the time of manufacture of the computer system or in the field whether an AGP bus bridge or a remote-PCI bus bridge is to be implemented. Selection of the type of bus bridge (AGP or remote-PCI) in the multiple use core logic chip set may be made by a hardware signal input, or by software during computer system configuration or power on self test ("POST"). Software configuration may also be determined upon detection of either an AGP or a remote-PCI device connected to the common AGP/remote-PCI bus.

Abstract translation: 在可以配置为加速图形端口（“AGP”）总线与主机和存储器总线之间的桥接器的计算机系统中提供多用途核心逻辑芯片组，作为远程​​外围组件互连（“远程” -PCI“）总线和主机和内存总线，或者作为主PCI总线和远程PCI总线之间的桥梁。 多用芯片组的功能是在计算机系统的制造时或在现场确定是否实现AGP总线桥或远程PCI总线桥。 可以通过硬件信号输入或在计算机系统配置或上电自检（“POST”）期间通过软件选择多用途核心逻辑芯片组中的总线桥（AGP或远程PCI）的类型。 也可以在检测到连接到公共AGP /远程PCI总线的AGP或远程PCI设备之后确定软件配置。

公开(公告)号：US5923654A

公开(公告)日：1999-07-13

申请号：US637521

申请日：1996-04-25

Applicant: Arnold Thomas Schnell

Inventor： Arnold Thomas Schnell

IPC: H04L12/56

CPC classification number: H04L45/745 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9031 ,  H04L49/101 ,  H04L49/201 ,  H04L49/351

Abstract: A network switch for transferring packets of information including a plurality of shared packet buffers for a plurality of network ports. The network switch includes a switch matrix for providing independent input and output data channels between any one of the packet buffers and any of the network ports. The network switch further includes a switch controller for controlling transfer of data packets between the network ports and the packet buffers. In this manner, all of the packet buffers are shared and accessible by any of the network ports through the switch matrix. Each of the packet buffers stores only one data packet at a time, although the packet buffers may also be expanded to store multiple packets. The switch matrix includes an input switch with inputs coupled to the network ports and outputs coupled to the packet buffers and programmable crosspoint connections. Furthermore the switch matrix includes an output switch with inputs coupled to the packet buffers and outputs coupled to the network ports and programmable crosspoint connections. A packet processor is also included for handling new address and for duplicating packets if multicast or broadcast.

Abstract translation: 一种用于传送包括用于多个网络端口的多个共享分组缓冲器的信息包的网络交换机。 网络交换机包括用于在任何一个分组缓冲器和任何网络端口之间提供独立的输入和输出数据信道的交换矩阵。 网络交换机还包括用于控制网络端口和分组缓冲器之间的数据分组传输的交换控制器。 以这种方式，所有的分组缓冲器被任何网络端口通过交换矩阵共享和访问。 每个分组缓冲器一次仅存储一个数据分组，尽管分组缓冲器也可以被扩展以存储多个分组。 开关矩阵包括具有耦合到网络端口的输入的输入开关和耦合到分组缓冲器和可编程交叉点连接的输出。 此外，开关矩阵包括具有耦合到分组缓冲器的输入的输出开关和耦合到网络端口和可编程交叉点连接的输出。 还包括处理新地址的分组处理器，并且如果组播或广播则复制分组。

公开(公告)号：US5909584A

公开(公告)日：1999-06-01

申请号：US911250

申请日：1997-08-15

Applicant: Siamak Tavallaei ,  Robert F. Olson

Inventor： Siamak Tavallaei ,  Robert F. Olson

IPC: G06F1/18 ,  G06F1/26 ,  G06F13/00 ,  H01H9/20

CPC classification number: G06F1/189 ,  Y10T307/944

Abstract: The invention relates to a computer system having a chassis with an access door allowing a user to access the computer circuitry. The computer circuitry has a plurality of critical circuit boards and an interlock circuit routed through connectors and cables associated with the critical circuitry. If any of the connectors are not connected or connected improperly the main power is prevented from turning on or the main power to the computer is turned off and auxiliary power is used to power indicator lights which aid a user determine which connector is not connected or improperly connected.

Abstract translation: 本发明涉及一种计算机系统，其具有带有允许用户访问计算机电路的访问门的机架。 计算机电路具有多个关键电路板和通过与关键电路相关联的连接器和电缆布线的互锁电路。 如果任何连接器未连接或连接不正确，则防止主电源打开或关闭计算机的主电源，并使用辅助电源为指示灯供电，以帮助用户确定哪个连接器未连接或不正确 连接的。

公开(公告)号：US5909572A

公开(公告)日：1999-06-01

申请号：US759025

申请日：1996-12-02

Applicant: John S. Thayer ,  John G. Favor ,  Frederick D. Weber

Inventor： John S. Thayer ,  John G. Favor ,  Frederick D. Weber

IPC: G06F9/30 ,  G06F9/302 ,  G06F9/312 ,  G06F9/315 ,  G06F9/38 ,  G06F9/00

CPC classification number: G06F9/30072 ,  G06F9/30014 ,  G06F9/30025 ,  G06F9/30032 ,  G06F9/30036 ,  G06F9/30043 ,  G06F9/30109 ,  G06F9/30163 ,  G06F9/30167 ,  G06F9/3885 ,  G06F9/3887

Abstract: A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU can be coupled either through a coprocessor bus or a local CPU bus to a conventional processor. The MEU employs vector registers, a vector ALU, and an operand routing unit (ORU) to perform a maximum number of the multimedia operations within as few instruction cycles as possible. Complex algorithms are readily performed by arranging operands upon the vector ALU in accordance with the desired algorithm flowgraph. The ORU aligns the operands within partitioned slots or sub-slots of the vector registers using vector instructions unique to the MEU. At the output of the ORU, operand pairs from vector source or destination registers can be easily routed and combined at the vector ALU. The vector instructions employ special load/store instructions in combination with numerous operational instructions to carry out concurrent multimedia operations on the aligned operands.

Abstract translation: 提供多媒体扩展单元（MEU）用于执行各种多媒体类型操作。 MEU可以通过协处理器总线或本地CPU总线耦合到常规处理器。 MEU使用向量寄存器，向量ALU和操作数路由单元（ORU）来尽可能少地执行多媒体操作。 通过根据期望的算法流程图将操作数布置在向量ALU上来容易地执行复杂算法。 ORU使用MAU特有的向量指令对齐向量寄存器的分区插槽或子时隙内的操作数。 在ORU的输出端，矢量源或目标寄存器的操作数对可以很容易地路由和组合在矢量ALU。 向量指令采用特殊的加载/存储指令与许多操作指令相结合，对对齐的操作数执行并发的多媒体操作。

公开(公告)号：US5896273A

公开(公告)日：1999-04-20

申请号：US777819

申请日：1996-12-31

Applicant: Paily T. Varghese ,  Robert J. Hastings ,  Carl E. Davis

Inventor： Paily T. Varghese ,  Robert J. Hastings ,  Carl E. Davis

IPC: G06F1/18 ,  G06F1/20 ,  G06F1/16 ,  H05K5/02

CPC classification number: G06F1/181 ,  G06F1/20 ,  G06F2200/1638

Abstract: A modular computer chassis for both rack mounting and free standing use comprising a housing adapted for receipt of a plurality of computer modules in a secured array. The modules are selectively accessible only through a cover panel door which may be locked to secure the integrity of the array. The modules are mounted in the chassis on individual slides which afford alignment and stability in the assembly thereof. Additionally, the modularity affords interchangeability with rack-mounted systems for maximizing the efficiency of operation and the effectiveness of installation and service. Problems within the system can thus be addressed by removing and replacing individual modules in a configuration which affords reliability and easy access.

Abstract translation: 一种用于机架安装和独立使用的模块化计算机机箱，包括适于在安全阵列中接收多个计算机模块的壳体。 这些模块可以仅通过可被锁定的盖板门选择性地接近以确保阵列的完整性。 这些模块在单独的滑块中安装在底盘中，其在组装中提供对准和稳定性。 此外，模块化提供与机架安装系统的互换性，以最大限度地提高操作效率和安装和服务的有效性。 因此，系统中的问题可以通过移除和更换提供可靠性和易于访问的配置中的各个模块来解决。

公开(公告)号：US5894412A

公开(公告)日：1999-04-13

申请号：US954335

申请日：1997-10-17

Applicant: Richard A. Faulk

Inventor： Richard A. Faulk

IPC: H02M1/00 ,  H02M1/42 ,  H02M7/122

CPC classification number: H02M1/4225 ,  H02M2001/007 ,  H02M2001/008 ,  Y02B70/126 ,  Y10T307/707

Abstract: Innovative systems and methods for advantageous use of a new isolated power converter topology, in which transformer isolation is provided by a very simple DC-DC converter operated in open-loop mode (with each switch running at a constant duty cycle of approximately 50%, to achieve an effective duty cycle of approximately 100%), and feedback or modulation is instead applied to a preconverter stage which also does power factor corrections. Since the isolation stage is operated at a constant duty cycle, distortion can be minimized and its efficiency can be fully optimized, with a simple circuit and small component count. Unlike a flyback converter, only a very small inductance is required. A simple control architecture is used with current control loop. The disclosed circuit tightly clamps the voltages on the switch and on the transformer, with no ringing nor overshoot.

Abstract translation: 创新的系统和方法有利于使用新的隔离式电力变换器拓扑，其中变压器隔离由开环工作模式下的非常简单的DC-DC转换器提供（每个开关以大约50％的恒定占空比运行， 以实现大约100％的有效占空比），并且反馈或调制被替代地应用于也进行功率因数校正的预变换器级。 由于隔离级在恒定占空比下工作，所以可以通过简单的电路和小的元件数量，使失真最小化并且其效率得到充分优化。 与反激式转换器不同，只需要非常小的电感。 电流控制回路采用简单的控制架构。 所公开的电路紧紧地夹紧开关和变压器上的电压，没有振铃或过冲。