公开(公告)号：US07777531B2

公开(公告)日：2010-08-17

申请号：US12106046

申请日：2008-04-18

申请人： John W. Fattaruso

发明人： John W. Fattaruso

IPC分类号： H03K5/22

CPC分类号： H03F3/45237 ,  H03F3/3071 ,  H03F3/45085 ,  H03F3/45112 ,  H03F3/45506 ,  H03F3/4565 ,  H03F2203/30048 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45431 ,  H03F2203/45434 ,  H03K19/017527

摘要： A method and apparatus for providing a low power low voltage differential signaling driver are disclosed. In an example, a low voltage differential signaling driver circuit is described, comprising a first current source to provide current to a first differential pair of PNP transistors, a pair of transresistance amplifiers driven by a corresponding pair of transconductance stages, a second current source to provide current to a second differential pair of PNP transistors, and an output port having a common mode output voltage and a differential output voltage based on a state of the first differential pair of PNP transistors and the second differential pair of PNP transistors.

摘要翻译： 公开了一种用于提供低功率低压差分信号驱动器的方法和装置。 在一个示例中，描述了一种低电压差分信号驱动器电路，其包括用于向PNP晶体管的第一差分对提供电流的第一电流源，由相应的一对跨导级驱动的一对跨阻放大器，第二电流源 根据PNP晶体管的第一差分对和PNP晶体管的第二差分对的状态，向PNP晶体管的第二差分对提供电流，以及具有共模输出电压和差分输出电压的输出端口。

公开(公告)号：US20050083124A1

公开(公告)日：2005-04-21

申请号：US10927947

申请日：2004-08-27

申请人： Alan Dawes

发明人： Alan Dawes

IPC分类号： H03F3/45

CPC分类号： H03F3/45112

摘要： Rail-to-rail-Input Buffer with constant mutual conductance comprising a differential input having a first input terminal and a second input terminal for applying an input signal; a first differential stage supplied with a first reference current, wherein the first differential stage is formed by PMOS-transistors having gate terminals connected to the input terminals; a second differential stage supplied with a second reference current wherein the second differential stage is formed by NMOS-transistors having gate terminals connected to the input terminals; a switching PMOS-transistor which switches through when the input signal is higher than a predetermined first threshold voltage to divert the first reference current supplied to the first differential stage to a first current mirror circuit which mirrors the first reference current; a switching NMOS-transistor which switches through when the input signal is lower than a predetermined second threshold voltage to divert the second reference current supplied to the second differential stage to a second current mirror circuit which mirrors the second reference current; a third differential stage formed by NMOS-transistors having gate terminals connected to the input terminals; wherein the third differential stage is supplied with the mirrored first reference current and replaces the first differential stage when the input signal is higher than the first threshold voltage; and a fourth differential stage formed by PMOS-transistors having gate terminals connected to the input terminals; wherein the fourth differential stage is supplied with the mirrored second reference current and replaces the second differential stage when the input signal is lower than the second threshold voltage.

摘要翻译： 具有恒定互导的轨至轨输入缓冲器，包括具有用于施加输入信号的第一输入端和第二输入端的差分输入; 提供有第一参考电流的第一差分级，其中所述第一差分级由具有连接到所述输入端的栅极端子的PMOS晶体管形成; 提供有第二参考电流的第二差分级，其中第二差分级由具有连接到输入端的栅极端子的NMOS晶体管形成; 开关PMOS晶体管，当所述输入信号高于预定的第一阈值电压时切换，以将提供给所述第一差分级的所述第一参考电流转移到第一参考电流，所述第一电流镜电路反射所述第一参考电流; 切换NMOS晶体管，其在输入信号低于预定的第二阈值电压时切换，以将提供给第二差分级的第二参考电流转换成镜像第二参考电流的第二电流镜电路; 由具有连接到输入端的栅极端子的NMOS晶体管形成的第三差分级; 其中所述第三差分级被提供所述镜像的第一参考电流，并且当所述输入信号高于所述第一阈值电压时，替换所述第一差分级; 以及由栅极端子连接到所述输入端的PMOS晶体管形成的第四差分级; 其中第四差分级被提供有镜像的第二参考电流，并且当输入信号低于第二阈值电压时，替换第二差分级。

公开(公告)号：US20040090270A1

公开(公告)日：2004-05-13

申请号：US10292146

申请日：2002-11-12

发明人： Charles Parkhurst

IPC分类号： H03F003/45

CPC分类号： H03F1/3211 ,  H03F3/3071 ,  H03F3/45112 ,  H03F3/45475

摘要： An apparatus for indicating a difference between a first voltage and a second voltage includes: (a) an input unit for receiving the first voltage at a first locus and receiving the second voltage at a second locus; the input unit quanitifying the difference; (b) an output unit coupled with the input unit and cooperating with the input unit to generate an output signal for effecting the indicating; and (c) a signal treating unit coupled with the output unit, the first locus and the second locus, and employing at least one algorithmic relation with at least one of the first voltage and the second voltage to generate at least one bias current for effecting a substantially balanced response by said output section in said generating said output signal as said difference varies. The at least one drive current has nonnegative values as the difference ranges in value.

公开(公告)号：US06724260B2

公开(公告)日：2004-04-20

申请号：US10306212

申请日：2002-11-27

申请人： Alan Lee Varner ,  Ahmad Dashtestani ,  Joel M. Halbert ,  Michael A. Steffes

发明人： Alan Lee Varner ,  Ahmad Dashtestani ,  Joel M. Halbert ,  Michael A. Steffes

IPC分类号： H03F304

CPC分类号： H03F3/45112 ,  H03F3/45139 ,  H03F3/45174

摘要： A low power current feedback amplifier having a lower output impedance input stage is provided. To reduce the output impedance, an input stage comprises a closed-loop input buffer. An exemplary input buffer comprises a closed-loop current feedback amplifier configured within the overall current feedback amplifier, wherein the output of the input buffer corresponds to the inverting node of the overall current feedback amplifier. The closed-loop configuration of the input buffer is facilitated by the use of an internal feedback resistor coupled from an inverting input terminal of the input buffer to the output of the input buffer, which corresponds to the inverting input terminal of the overall current feedback amplifier. The closed-loop input buffer realizes a low output impedance since the loop gain reduces the output impedance of the input buffer. With a lower output impedance, the bandwidth of the current feedback amplifier becomes more independent of the gain, even at low current implementations.

摘要翻译： 提供具有较低输出阻抗输入级的低功率电流反馈放大器。 为了减小输出阻抗，输入级包括闭环输入缓冲器。 示例性输入缓冲器包括配置在总电流反馈放大器内的闭环电流反馈放大器，其中输入缓冲器的输出对应于整个电流反馈放大器的反相节点。 输入缓冲器的闭环配置通过使用从输入缓冲器的反相输入端耦合到输入缓冲器的输出的内部反馈电阻来实现，其对应于整个电流反馈放大器的反相输入端 。 闭环输入缓冲器实现了低输出阻抗，因为环路增益降低了输入缓冲器的输出阻抗。 具有较低的输出阻抗，即使在低电流实现下，电流反馈放大器的带宽变得更加独立于增益。

公开(公告)号：US6147533A

公开(公告)日：2000-11-14

申请号：US135686

申请日：1998-08-18

申请人： Takanori Okuda ,  Naruichi Yokogawa ,  Takayuki Shimizu ,  Fumitaka Nakamura

发明人： Takanori Okuda ,  Naruichi Yokogawa ,  Takayuki Shimizu ,  Fumitaka Nakamura

IPC分类号： H03F3/08 ,  H03F3/30 ,  H03F3/45 ,  H03K5/08 ,  H03K5/12

CPC分类号： H03F3/3066 ,  H03F3/08 ,  H03F3/087 ,  H03F3/3088 ,  H03F3/45112 ,  H03F3/45982 ,  H03K5/082 ,  H03F2203/45544 ,  H03F2203/45631

摘要： A data communication receiving element includes a photo-receiving element for receiving an external light signal and for converting the light signal to a current signal. It further includes an amplifier circuit for amplifying the current signal after converting the current signal to a voltage signal. A waveform shaping circuit is included for shaping an output voltage waveform from the amplifier circuit to a substantially square pulse. Finally, an integrator is included for converting the substantially square pulse to a non-square pulse. This is achieved by extending a rising time necessary for shifting the substantially square pulse from a low potential level to a high potential level, and by extending a falling time necessary for shifting the substantially square pulse from the high potential level to the low potential level. As such, deterioration of an S/N ratio is suppressed.

摘要翻译： 数据通信接收元件包括用于接收外部光信号并将光信号转换为电流信号的光接收元件。 它还包括放大器电路，用于在将电流信号转换成电压信号之后放大电流信号。 包括波形整形电路，用于将来自放大器电路的输出电压波形整形为基本平方的脉冲。 最后，包括用于将基本上方波的脉冲转换成非方波脉冲的积分器。 这是通过将基本上平方脉冲从低电位电平移位到高电位电平所需的上升时间，并且通过延长将基本上平方脉冲从高电位电平移位到低电位电平所需的下降时间来实现的。 因此，S / N比的劣化被抑制。

公开(公告)号：US4636744A

公开(公告)日：1987-01-13

申请号：US782689

申请日：1985-10-01

申请人： Ken R. King ,  Celimo P. Hernandez

发明人： Ken R. King ,  Celimo P. Hernandez

IPC分类号： H03F3/30 ,  H03F3/45 ,  H03F3/68

CPC分类号： H03F3/4521 ,  H03F3/3066 ,  H03F3/45094 ,  H03F3/45112 ,  H03F3/45125 ,  H03F3/45224 ,  H03F2203/30048 ,  H03F2203/45258 ,  H03F2203/45366 ,  H03F2203/45392 ,  H03F2203/45656 ,  H03F2203/45674

摘要： The front end of an operational amplifier having an improved controlled slew rate and high gain current output capabilities. The amplifier includes a slew enhancement or large signal stage connected in parallel to a normal front end or small signal stage. The small signal stage supplies a transconductance output which is approximately linearly related to the input until its slew rate limit. The slew enhancement stage is designed to provide slew current when the small signal stage reaches its slew rate limit, thereby providing an increased output current response to an increasing differential input voltage beyond the slew rate of the small signal stage. Two pair of differential amplifiers are used in both a large and small signal stage as well as an improved output stage comprising of current mirrors.

摘要翻译： 具有改进的受控转换速率和高增益电流输出能力的运算放大器的前端。 放大器包括与正常前端或小信号级并联连接的转换增强或大信号级。 小信号级提供跨输出，其与输入近似线性相关，直到其转换速率限制。 该转换增益级设计为当小信号级达到其转换速率极限时提供转换电流，从而为超过小信号级转换速率的差分输入电压提供增加的输出电流响应。 在大信号级和小信号级中都使用两对差分放大器，以及包括电流镜的改进的输出级。