公开(公告)号：US5920183A

公开(公告)日：1999-07-06

申请号：US957079

申请日：1997-10-24

申请人： Michael Null

发明人： Michael Null

IPC分类号： G05F3/22 ,  G05F3/04 ,  G05F5/00

CPC分类号： G05F3/227

摘要： A voltage regulator for producing an output voltage that selectively tracks a logic voltage or a reference voltage and method of operating the voltage regulator. The voltage regulator has a diode OR with a logic and reference transistors. The logic voltage is scaled to be close in value to the reference voltage, if the two are not close in value. When the scaled logic voltage is larger than the reference voltage the logic transistor is on, turning off the reference transistor and passing the logic voltage to the output of the diode OR. When the scaled logic voltage is smaller than the reference voltage the logic transistor is off and the reference transistor is on, passing the reference voltage to the output of the diode OR. The voltage at the output of the diode OR is then compared in a comparator with the voltage at the output of the voltage regulator, which is scaled by the same factor as the logic voltage. The comparator increases the output voltage if it is smaller than the voltage at the output of the diode OR, and decreases the output voltage if it is larger than the voltage at the output of the diode OR. This permits the circuitry attached to the voltage regulator to operate when the logic voltage is not present, and to operate at the exact same voltage as the logic voltage when the logic voltage is present.

摘要翻译： 用于产生选择性地跟踪逻辑电压或参考电压的输出电压的电压调节器以及操作所述电压调节器的方法。 电压调节器具有二极管OR或逻辑和参考晶体管。 如果两个值不接近，则逻辑电压被缩放到与参考电压接近的值。 当比例逻辑电压大于参考电压时，逻辑晶体管导通，关闭参考晶体管并将逻辑电压传递到二极管OR的输出。 当比例逻辑电压小于参考电压时，逻辑晶体管截止，参考晶体管导通，将参考电压通过二极管OR的输出。 然后将二极管OR的输出端的电压在比较器中与电压调节器的输出端的电压进行比较，该电压按照与逻辑电压相同的因子进行放大。 如果比较器比二极管OR的输出端的电压小，则比较器增加输出电压，如果输出电压大于二极管的输出端的电压，则输出电压降低。 当逻辑电压不存在时，这允许连接到电压调节器的电路工作，并且在存在逻辑电压时与逻辑电压完全相同的电压工作。

公开(公告)号：US5914586A

公开(公告)日：1999-06-22

申请号：US43998

申请日：1998-04-02

申请人： Hiroyuki Fujita ,  Koichi Inoue

发明人： Hiroyuki Fujita ,  Koichi Inoue

IPC分类号： G05F3/22 ,  G05F3/26 ,  H02H7/18 ,  H02J7/00

CPC分类号： G05F3/222 ,  G05F3/265 ,  H02H7/18 ,  H02J7/0031

摘要： A power supply unit has an overdischarge detection circuit for detecting overdischarge of a power source, an overcurrent detection circuit for detecting overcurrent, and a stopping circuit for stopping overdischarge or overcurrent in accordance with an overdischarge detection signal or an overcurrent detection signal. The power supply unit is further provided with a delay circuit to prevent the overdischarge detection circuit and the overcurrent detection circuit from being activated erroneously by external noises. This delay circuit provides a variable delay time so that the delay time will be longer when overdischarge is detected than when overcurrent is detected. This makes it possible to stop overdischarge and overcurrent without fail.

摘要翻译： PCT No.PCT / JP97 / 03048 Sec。 371日期：1998年4月2日 102（e）1998年4月2日PCT 1997年8月28日PCT公布。 公开号WO98 / 09361 日期1998年3月5日电源单元具有用于检测电源的过放电的过放电检测电路，用于检测过电流的过电流检测电路，以及根据过放电检测信号或过电流检测停止过放电或过电流的停止电路 信号。 电源单元还设置有延迟电路，以防止过放电检测电路和过电流检测电路被外部噪声错误地激活。 该延迟电路提供可变延迟时间，使得当检测到过度放电时，延迟时间将比检测到过电流时更长。 这使得可以停止过放电和过电流。

公开(公告)号：US5808458A

公开(公告)日：1998-09-15

申请号：US942609

申请日：1997-10-02

申请人： Masanori Fujisawa ,  Sachito Horiuchi ,  Kengo Adachi

发明人： Masanori Fujisawa ,  Sachito Horiuchi ,  Kengo Adachi

IPC分类号： G05F3/22 ,  G05F3/24 ,  G05F3/16

CPC分类号： G05F3/247 ,  G05F3/227

摘要： In a regulated power supply circuit which includes a differential amplifier circuit and a current output circuit which receives the output from the differential amplifier circuit, wherein the current output circuit comprises a drive stage transistor which operates upon receipt of an output from the differential amplifier circuit at an input terminal thereof, a current output stage of a MOSFET which is driven by the drive stage transistor and a load resistor for the drive stage transistor connected to the output side thereof, and the load resistor and the drive stage transistor are provided between a power source line and a ground line and the MOSFET is driven by an output taken out via the load resistor.

摘要翻译： 在包括差分放大器电路和接收来自差分放大器电路的输出的电流输出电路的稳压电源电路中，其中电流输出电路包括驱动级晶体管，其在接收到差分放大器电路的输出时工作， 其输入端子，由驱动级晶体管驱动的MOSFET的电流输出级和连接到其输出侧的驱动级晶体管的负载电阻器，负载电阻器和驱动级晶体管设置在功率 源极线和接地线，MOSFET由通过负载电阻取出的输出驱动。

公开(公告)号：US5712590A

公开(公告)日：1998-01-27

申请号：US576798

申请日：1995-12-21

申请人： Michael F. Dries ,  Benjamin L. Gingerich

发明人： Michael F. Dries ,  Benjamin L. Gingerich

IPC分类号： G05F3/22 ,  G05F1/10

CPC分类号： G05F3/227

摘要： A voltage reference circuit includes at least a first and a second voltage supply having different operating temperature ranges. Output voltages of the two voltage supplies are compared and one of the supplies is selected to provide an optimum voltage reference.

摘要翻译： 电压参考电路至少包括具有不同工作温度范围的第一和第二电压源。 比较两个电压源的输出电压，并选择其中一个电源以提供最佳参考电压。

公开(公告)号：US5644217A

公开(公告)日：1997-07-01

申请号：US614315

申请日：1996-03-12

申请人： Katsumi Kusaba

发明人： Katsumi Kusaba

IPC分类号： H03K19/086 ,  G05F3/22 ,  H03K19/0175 ,  H03K19/018 ,  G05F3/20

CPC分类号： G05F3/222

摘要： An ECL output circuit includes an emitter differential pair of transistors, a positive voltage source connected to the collectors of this pair of transistors, a reference voltage source, a constant current supplying circuit, and an output circuit. The emitter differential pair of transistors has their emitters connected together, the base of one of them is connected to an input terminal where an input voltage is adapted to be applied, the reference voltage source is adapted to apply a reference voltage to the base of the other of the pair of transistors, and the positive voltage source is connected to their collectors.

摘要翻译： ECL输出电路包括发射极差分对晶体管，连接到该对晶体管的集电极的正电压源，参考电压源，恒流供应电路和输出电路。 晶体管的发射极差对将其发射极连接在一起，其中一个的基极连接到输入电压适于施加的输入端，参考电压源适于将参考电压施加到 另一对晶体管，正电压源连接到它们的集电极。

公开(公告)号：US5563503A

公开(公告)日：1996-10-08

申请号：US208360

申请日：1994-03-08

申请人： Solomon K. L. Ng ,  Gee H. Loh

发明人： Solomon K. L. Ng ,  Gee H. Loh

IPC分类号： G05F3/22 ,  G05F3/26 ,  G05F3/16 ,  H03F3/04

CPC分类号： G05F3/22 ,  G05F3/265

摘要： A source/sink current generating circuit is arranged to generate source and sink currents which are matched and insensitive to fan out. This is achieved by using a biasing transistor (Q13) between first and second current mirrors which generate respectively the source and sink currents.

摘要翻译： 源/宿电流产生电路被布置成产生与扇出匹配和不敏感的源极和吸收电流。 这通过使用分别产生源极和吸收电流的第一和第二电流镜之间的偏置晶体管（Q13）来实现。

公开(公告)号：US5545977A

公开(公告)日：1996-08-13

申请号：US74561

申请日：1993-06-09

申请人： Toshio Yamada ,  Akinori Shibayama ,  Shunichi Iwanari ,  Atsushi Fujiwara

发明人： Toshio Yamada ,  Akinori Shibayama ,  Shunichi Iwanari ,  Atsushi Fujiwara

IPC分类号： G05F1/24 ,  G05F1/613 ,  G05F3/24 ,  G11C11/407 ,  G11C11/408 ,  H01L27/10 ,  H03K19/00 ,  G05F3/22

CPC分类号： G05F3/245 ,  Y10S323/907

摘要： In a circuit, a resistance element is interposed between a positive power supply line (external power supply voltage level VCC) and an output node. To feedback an output potential, there is disposed an N-type MOSFET of which gate is connected to the output node and of which source is connected to the earth line (earth potential VSS) in the circuit. Another three N-type MOSFETs which are so connected in series to one another as to form a MOS diode, are interposed between the drain of the feedback N-type MOSFET and the output node. The earth line also serves as a reference potential line for the potential of the output node. Variations of the threshold voltages of the MOSFETs due to temperature variations are compensated. This restrains the output potential from varying.

摘要翻译： 在电路中，在正电源线（外部电源电压电平VCC）和输出节点之间插入电阻元件。 为了反馈输出电位，设置了一个N型MOSFET，其栅极连接到输出节点，并且其中的源极连接到电路中的地线（地电位VSS）。 在反馈N型MOSFET的漏极和输出节点之间插入另外三个彼此串联连接形成MOS二极管的N型MOSFET。 地线也可作为输出节点电位的参考电位线。 由于温度变化导致的MOSFET的阈值电压的变化被补偿。 这就抑制了输出电位的变化。

公开(公告)号：US5432433A

公开(公告)日：1995-07-11

申请号：US194331

申请日：1994-02-08

申请人： Masaharu Ikeda

发明人： Masaharu Ikeda

IPC分类号： G05F3/30 ,  G05F3/22 ,  H03F1/30 ,  H03F3/343 ,  H03F3/347 ,  G05F3/16

CPC分类号： G05F3/225 ,  G05F3/227

摘要： A current source including a first transistor and a second transistor with their bases connected together, a resistor connected to the emitter of the first transistor, a third transistor with its base connected to the collector of the second transistor, and an amplifying unit. The amplifying unit has its input end connected to the collector of the third transistor and is further provided with a plurality of output portions with output resistors. The plurality of output portions of the amplifying unit are connected to the collectors of the first transistor, second transistor and third transistor, respectively. The base current of the third transistor is set to make the collector currents of the first transistor and second transistor substantially equal.

摘要翻译： 一种电流源，包括第一晶体管和第二晶体管，其基极连接在一起，连接到第一晶体管的发射极的电阻器，其基极连接到第二晶体管的集电极的第三晶体管和放大单元。 放大单元的输入端连接到第三晶体管的集电极，并且还具有输出电阻器的多个输出部分。 放大单元的多个输出部分分别连接到第一晶体管，第二晶体管和第三晶体管的集电极。 第三晶体管的基极电流被设定为使第一晶体管和第二晶体管的集电极电流基本相等。

公开(公告)号：US5428287A

公开(公告)日：1995-06-27

申请号：US304425

申请日：1994-09-12

申请人： Dan Agiman

发明人： Dan Agiman

IPC分类号： G05F3/22 ,  H03K17/082 ,  G05F3/16 ,  H02H3/00

CPC分类号： H03K17/0826 ,  G05F3/22 ,  Y10S323/907

摘要： An overcurrent limit circuit in which the output transistor and current sense transistor share a common collector and common base. A reference voltage is compared with a voltage derived from a current sense resistor. The circuit limits the current to the base of the output transistor in response to the reference voltage threshold being reached at the current sense resistor. A Vbe comparator comprised of two transistors may be used with a first bias current to both transistors and a second bias current to one of the two transistors.

摘要翻译： 一个过电流限制电路，其中输出晶体管和电流检测晶体管共用公共集电极和公共基极。 将参考电压与从电流检测电阻器导出的电压进行比较。 该电路响应于在电流检测电阻器处达到的参考电压阈值将电流限制到输出晶体管的基极。 可以使用由两个晶体管组成的Vbe比较器，其中第一偏置电流到两个晶体管，并且第二偏置电流用于两个晶体管之一。

公开(公告)号：US5381083A

公开(公告)日：1995-01-10

申请号：US76971

申请日：1993-06-16

申请人： Masanori Inamori ,  Toshihide Miyake

发明人： Masanori Inamori ,  Toshihide Miyake

IPC分类号： G05F3/22 ,  G05F3/26 ,  G05F3/16

CPC分类号： G05F3/265 ,  G05F3/222

摘要： There are provided a first constant-current circuit and a second constant-current circuit, and a first resistor connected in series with the first constant-current circuit generates a band-gap voltage. The first constant-current circuit and the second constant-current circuit constitute a current Miller circuit, and a part of a current that flows through the second resistor connected in series with the second constant-current circuit is outputted as a constant current source. The constant-current power supply IC, which has the above-mentioned arrangement, is designed as follows: the first resistor and the second resistor have a predetermined line-width ratio that is determined in such a manner that if the respective line-widths vary by virtually the same value, a varied amount in the second constant current value that has been caused by a variation in the value of resistivity of the first resistor is cancelled by a varied amount caused by a variation in the value of resistivity of the second resistor. This arrangement is effective in compensating function and makes it possible to minimize the error on the constant current output due to deviations that occur during production.

摘要翻译： 提供第一恒流电路和第二恒流电路，并且与第一恒流电路串联连接的第一电阻器产生带隙电压。 第一恒流电路和第二恒流电路构成电流米勒电路，并且流过与第二恒流电路串联连接的第二电阻器的一部分电流作为恒流源输出。 具有上述结构的恒流电源IC设计如下：第一电阻器和第二电阻器具有预定的线宽比，其以如下方式确定：如果各个线宽变化 通过实质上相同的值，由第一电阻器的电阻率值的变化引起的第二恒定电流值的变化量被由第二电阻器的电阻率值的变化引起的变化量抵消 。 这种布置在补偿功能方面是有效的，并且可以使由于在生产期间发生的偏差导致的恒定电流输出的误差最小化。