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公开(公告)号:US20220164620A1
公开(公告)日:2022-05-26
申请号:US17524094
申请日:2021-11-11
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Olivier ROUY
IPC: G06K19/077 , G06K19/07 , H05B45/3725 , H05B45/32 , H05B45/50
Abstract: A light-emitting diode has an anode terminal coupled to a node of application of a power supply voltage by a first transistor and a cathode terminal coupled to a node of application of a reference voltage by a second transistor. A microcontroller includes a digital-to-analog converter and a comparator, with the comparator having a first input coupled to one of the anode and cathode terminals of the diode and a second input configured to receive an output voltage of the converter. An output signal of the comparator controls one of the first and second transistors to turn off when the comparator detects an operating condition where current flow in the light-emitting diode exceeds maximum current limit (such as with the light-emitting diode operating in an exponential operating area.
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公开(公告)号:US11340798B2
公开(公告)日:2022-05-24
申请号:US16898921
申请日:2020-06-11
Inventor: William Orlando , Julien Couvrand , Pierre Guillemin
Abstract: A method includes receiving, by a first microprocessor, a request of modification of a content of a first memory of the first microprocessor, the first memory being accessible only by the first microprocessor. The method includes accessing, by the first microprocessor, first data associated with the request and a signature generated from the first data with an asymmetric cipher algorithm. The first data and the signature are available in a second memory of a second microprocessor, and the first data is representative of a modification to be applied to the content of the first memory. The modification is representative of a modification of a set of services exposed by the first microprocessor. The method includes verifying, by the first microprocessor, authenticity of the first data based on the signature; and modifying the content of the first memory according to the first data, the modifying being conditioned by the verifying.
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公开(公告)号:US20220156542A1
公开(公告)日:2022-05-19
申请号:US17521524
申请日:2021-11-08
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Olivier ROUY
IPC: G06K19/07 , G06K19/077 , G06Q20/40 , H01Q1/22
Abstract: A smart card includes a first circuit delivering a power supply voltage and a second circuit coupled to the first circuit by an electrical conductor and powered with the power supply voltage. A light-emitting diode has a first terminal coupled to the electrical conductor and a second terminal coupled to a first terminal of the second circuit. During a first operating phase, the first circuit delivers a first value of the power supply voltage and the second circuit applies a first voltage to the first terminal. During a second operating phase, the first circuit delivers a second value of the power supply voltage and the second circuit applies a second voltage to the first terminal.
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公开(公告)号:US11328098B2
公开(公告)日:2022-05-10
申请号:US16894523
申请日:2020-06-05
Applicant: STMICROELECTRONICS (ROUSSET) SAS
Inventor: Fabrice Marinet
Abstract: An electronic circuit includes an interface, a read-only memory in which encrypted data are stored, and cryptographic circuitry coupled to the interface. In operation, the cryptographic circuitry uses a decryption key received via the interface to decrypt the encrypted data. The electronic circuit performs one or more operations using the decrypted data.
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公开(公告)号:US20220140233A1
公开(公告)日:2022-05-05
申请号:US17508754
申请日:2021-10-22
Applicant: STMICROELECTRONICS (ROUSSET) SAS
Inventor: Philippe BOIVIN
IPC: H01L45/00
Abstract: The present description concerns a device including phase-change memory cells, each memory cell including a first resistive element in lateral contact with a second element made of a phase-change material.
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公开(公告)号:US20220140232A1
公开(公告)日:2022-05-05
申请号:US17507645
申请日:2021-10-21
Inventor: Philippe BOIVIN , Roberto SIMOLA , Yohann MOUSTAPHA-RABAULT
Abstract: The present description concerns a device including phase-change memory cells, each memory cell including a first resistive element in lateral contact with a second element made of a phase-change material.
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397.
公开(公告)号:US20220139782A1
公开(公告)日:2022-05-05
申请号:US17516857
申请日:2021-11-02
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Franck JULIEN
IPC: H01L21/8234 , H01L21/306 , H01L21/266 , H01L21/308 , H01L29/66
Abstract: An integrated circuit includes metal-oxide-semiconductor “MOS” transistors formed on a semiconductor substrate. The MOS transistors have gate stacks belonging to at least one gate stack category and dielectric regions of sidewall spacers on the sides of the gate stacks. At least a first MOS transistor has a gate stack of said at least one gate stack category that includes dielectric regions of sidewall spacers having a first width. At least a second MOS transistor has a gate stack of the same gate stack category with dielectric regions of sidewall spacers having a second width different from the first width.
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公开(公告)号:US20220122910A1
公开(公告)日:2022-04-21
申请号:US17566437
申请日:2021-12-30
Applicant: STMICROELECTRONICS (ROUSSET) SAS
Inventor: François TAILLIET , Guilhem BOUTON
IPC: H01L23/522 , H01L21/66 , H01L21/768 , H01L23/528 , H01L27/02 , H01L49/02
Abstract: A method of manufacturing electronic chips containing low-dispersion components, including the steps of: mapping the average dispersion of said components according to their position in test semiconductor wafers; associating, with each component of each chip, auxiliary correction elements; activating by masking the connection of the correction elements to each component according to the initial mapping.
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公开(公告)号:US20220115441A1
公开(公告)日:2022-04-14
申请号:US17559821
申请日:2021-12-22
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Philippe BOIVIN
IPC: H01L27/24 , H01L21/8222 , H01L27/082 , H01L45/00 , H01L29/10
Abstract: The disclosure relates to integrated circuits including one or more rows of transistors and methods of forming rows of transistors. In an embodiment, an integrated circuit includes a row of bipolar transistors including a first semiconductor layer having a plurality of first conduction regions, a second semiconductor layer having a second conduction region, a common base between the first semiconductor layer and the second semiconductor layer, and a plurality of insulator walls extending in a first direction. The first conduction regions are separated from one another by the insulator walls. The integrated circuit further includes an insulating trench extending in a second direction and in contact with each of the bipolar transistors of the row of bipolar transistors. A conductive layer is coupled to the base, and the conductive layer extends through the insulator walls and extends at least partially into the insulating trench.
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400.
公开(公告)号:US20220115077A1
公开(公告)日:2022-04-14
申请号:US17558123
申请日:2021-12-21
Applicant: STMicroelectronics (Rousset) SAS
Inventor: François Tailliet , Chama Ameziane El Hassani
Abstract: A method for writing to electrically erasable and programmable non-volatile memory and a corresponding integrated circuit are disclosed. In an embodiment a method includes operatively connecting a filter circuit belonging to a communication interface to an oscillator circuit, wherein the communication interface is physically connected to a bus, generating, by the oscillator circuit, an oscillation signal and regulating the oscillation signal by the filter circuit so as to generate a clock signal for timing a write cycle.
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