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公开(公告)号：US20150289154A1
公开(公告)日：2015-10-08
申请号：US14517447
申请日：2014-10-17
Applicant: Analog Devices Global
Inventor： Patrick Joseph Pratt
IPC: H04W24/08
CPC classification number: H04W24/08 , G01L23/16 , G01R23/16 , H03J1/0091
Abstract: A single complex calculation for locating a dominant frequency, such as an interfering signal in a frequency range, is replaced by several much easier ones. A signal is analyzed over a first frequency range to locate at least one comparatively significant frequency component therein. This can involve analyzing, using electronic hardware, a test range of frequencies to identify a potentially significant component within the test range; and determining, using electronic hardware, if a condition for finishing the analysis has been met. If the condition has not been met, the test range is modified as a result of the analysis and the operations of analyzing and determining are repeated.
Abstract translation: 用于定位主频（例如频率范围内的干扰信号）的单个复杂计算被几个更容易的替代。 在第一频率范围上分析信号以在其中定位至少一个比较显着的频率分量。 这可能涉及使用电子硬件分析测试频率范围来识别测试范围内的潜在重要组件; 以及如果满足用于完成分析的条件，则使用电子硬件来确定。 如果条件尚未得到满足，则作为分析结果修改测试范围，重复分析和确定操作。
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公开(公告)号：US20150288399A1
公开(公告)日：2015-10-08
申请号：US14527608
申请日：2014-10-29
Applicant: Analog Devices Global
Inventor： Patrick Joseph Pratt
IPC: H04B1/12
CPC classification number: H04B1/123
Abstract: A system is described for forming an estimate of an unwanted signal component that may be formed as a result of non-linearities in a system. The estimate is used to form a cancellation signal which is added to an input signal to reduce the influence of the unwanted component.
Abstract translation: 描述了一种用于形成可能由系统中的非线性结果形成的不想要的信号分量的估计的系统。 该估计用于形成消除信号，其被添加到输入信号以减少不想要的分量的影响。
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433.发明授权Dual-tub junction-isolated voltage clamp devices for protecting low voltage circuitry connected between high voltage interface pins and methods of forming the same 有权双槽结隔离电压钳位装置，用于保护连接在高压接口引脚之间的低压电路及其形成方法公开(公告)号：US09147677B2
公开(公告)日：2015-09-29
申请号：US13896123
申请日：2013-05-16
Applicant: ANALOG DEVICES GLOBAL
Inventor： Javier Alejandro Salcedo , David J Clarke , Jonathan Glen Pfeifer
IPC: H01L29/66 , H01L21/332 , H01L27/02 , H01L29/74 , H01L29/87 , H01L27/08 , H01L21/761 , H01L29/10
CPC classification number: H01L27/0262 , H01L21/761 , H01L27/027 , H01L27/0817 , H01L29/1083 , H01L29/1087 , H01L29/66121 , H01L29/7436 , H01L29/87
Abstract: Dual-tub junction-isolated voltage clamp devices and methods of forming the same are provided herein. The voltage clamp device can provide junction-isolated protection to low voltage circuitry connected between first and second high voltage interface pins. In certain implementations, a voltage clamp device includes a PNPN protection structure disposed in a p-well, a PN diode protection structure disposed in an n-well positioned adjacent the p-well, a p-type tub surrounding the p-well and the n-well, and an n-type tub surrounding the p-type tub. The p-type tub and the n-type tub provide junction isolation, the p-type tub can be electrically floating, and the n-type tub can be electrically connected to the second pin. The first and second pins can operate at a voltage difference below the junction isolation breakdown, and the second pin can operate with higher voltage than the first pin.
Abstract translation: 双槽结隔离电压钳装置及其形成方法在此提供。 电压钳位器件可以为连接在第一和第二高压接口引脚之间的低压电路提供结隔离保护。 在某些实施方式中，电压钳位装置包括设置在p阱中的PNPN保护结构，PN二极管保护结构，其布置在邻近p阱的n阱中，围绕p阱的p型阱和 n型井和围绕p型桶的n型桶。 p型桶和n型桶提供结隔离，p型桶可以电浮动，并且n型桶可以电连接到第二销。 第一和第二引脚可以在低于结隔离击穿的电压差下工作，而第二引脚可以以比第一引脚更高的电压工作。
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公开(公告)号：US20150236658A1
公开(公告)日：2015-08-20
申请号：US14282484
申请日：2014-05-20
Applicant: Analog Devices Global
Inventor： Eamon Nash , Mingming Zhao , Ovidiu Vasile Balaj , Peadar Antony Forbes , Claire Masterson
CPC classification number: H03F1/52 , H03F1/0222 , H03F1/0266 , H03F3/195 , H03F3/24 , H03F3/72 , H03F2200/102 , H03F2200/18 , H03F2200/192 , H03F2200/195 , H03F2200/426 , H03F2200/435 , H03F2200/451 , H03F2203/7215 , H03F2203/7221
Abstract: Aspects of this disclosure relate to protecting a circuit, such as an amplifier, from transient overdrive events and/or average overdrive events. In one embodiment, an indication of average power, such as root mean squared (RMS) power of a radio frequency (RF) signal, can be compared to a first threshold and an indication of a peak RF power can be compared to a second threshold. When the indication of average power exceeds the first threshold, an average overdrive event can be detected. When the indication of peak power exceeds the second threshold, a peak overdrive event can be detected. If either a transient overdrive event or an average overdrive event is detected, a circuit, such as an amplifier, can be protected.
Abstract translation: 本公开的方面涉及保护诸如放大器的电路免受瞬态过驱动事件和/或平均过驱动事件的影响。 在一个实施例中，能够将射频（RF）信号的平均功率（诸如均方根（RMS））功率的指示与第一阈值进行比较，并且峰值RF功率的指示可以与第二阈值进行比较 。 当平均功率的指示超过第一阈值时，可以检测平均过驱动事件。 当峰值功率的指示超过第二阈值时，可以检测峰值过驱动事件。 如果检测到瞬态过驱动事件或平均过驱动事件，则可以保护诸如放大器的电路。
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公开(公告)号：US20150233857A1
公开(公告)日：2015-08-20
申请号：US14183046
申请日：2014-02-18
Applicant: ANALOG DEVICES GLOBAL
Inventor： Paul Martin Lambkin , William Allan Lane
Abstract: Methods, devices and electronic components are disclosed, including a method of testing an integrity of a reduced gas pressure region at at least part of an electronic device, the method comprising applying a first current or voltage to a conductor, wherein the conductor includes at least one thermocouple formed on the device, and measuring an electrical property of the device.
Abstract translation: 公开了方法，装置和电子部件，包括在电子装置的至少一部分处测试降低的气体压力区域的完整性的方法，所述方法包括向导体施加第一电流或电压，其中所述导体至少包括 一个热电偶形成在器件上，并测量器件的电气特性。
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Patent Agency Ranking
公开(公告)号：US20150147005A1
公开(公告)日：2015-05-28
申请号：US14611735
申请日：2015-02-02
Applicant: ANALOG DEVICES GLOBAL
Inventor： Boris Lerner , Michael Meyer-Pundsack , Gopal Gudhdur Karanam , Pradip Thaker
IPC: G06T1/20
CPC classification number: G06T1/20 , G06T1/60 , G06T2200/28
Abstract: Embodiments of the present invention provide for improved timing control in 2-D image processing to maintain a constant rate of fetches and pixel outputs even when the processing operations transition to a new line or frame of pixels. A one-to-one relationship between incoming pixel rate and outgoing pixel rate is maintained without additional clock cycles or memory bandwidth as an improved timing control according to the present invention takes advantage of idle memory bandwidth by pre-fetching a new column of pixel data in a first pixel block of a next line or frame while a new column of an edge pixel block on a current line is duplicated or zeroed out. As the edge pixel block(s) on the current line are processed, the data in the first pixel block of the next line or frame become ready for computation without extra clock cycles or extra memory bandwidth.
Abstract translation: 本发明的实施例提供了二维图像处理中的改进的定时控制，即使当处理操作转换到新的像素像素或一行像素时，仍然保持恒定的提取速率和像素输出。 保持输入像素速率和输出像素速率之间的一对一关系，而不需要额外的时钟周期或存储器带宽，因为根据本发明的改进的定时控制通过预取一个新的像素数据列来利用空闲存储器带宽 在下一行或帧的第一像素块中，而当前行上的边缘像素块的新列被复制或清零。 当处理当前行上的边缘像素块时，下一行或帧的第一像素块中的数据就可以在没有额外的时钟周期或额外的存储器带宽的情况下进行计算。
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公开(公告)号：US11228310B2
公开(公告)日：2022-01-18
申请号：US17080785
申请日：2020-10-26
Applicant: Analog Devices Global Unlimited Company
Inventor： Ying Zhao , Alan O'Donnell , Michael James Twohig , Olly J. Kierse , James Thomas Sheeran , Michael C. W. Coln , Paul W. Stevens , Bruce A. Hecht , Padraig Fitzgerald , Mark Schirmer
Abstract: Optically isolated micromachined (MEMS) switches and related methods are described. The optically isolated MEMS switches described herein may be used to provide isolation between electronic devices. For example, the optically isolated MEMS switches of the types described herein can enable the use of separate grounds between the receiving electronic device and the control circuitry. Isolation of high-voltage signals and high-voltage power supplies can be achieved by using an optical isolator and a MEMS switch, where the optical isolator controls the state of the MEMS switch. In some embodiments, utilizing optical isolators to provide high voltages, the need for electric high-voltage sources such as high-voltage power supplies and charge pumps may be removed, thus removing the cause of potential damage to the receiving electronic device. In one example, the optical isolator and the MEMS switch may be co-packaged on the same substrate.
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公开(公告)号：US20210405130A1
公开(公告)日：2021-12-30
申请号：US17344687
申请日：2021-06-10
Applicant: Analog Devices Global
Inventor： Alan J. O'Donnell , Robert Guyol , Maria Jose Martinez , Jan Kubik , Padraig L. Fitzgerald , Javier Calpe Maravilla , Michael P. Lynch , Eoin E. English
Abstract: A magnetic device may include a magnetic structure, a device structure, and an associated circuit. The magnetic structure may include a patterned layer of material having a predetermined magnetic property. The patterned layer may be configured to, e.g., provide a magnetic field, sense a magnetic field, channel or concentrate magnetic flux, shield a component from a magnetic field, or provide magnetically actuated motion, etc. The device structure may be another structure of the device that is physically connected to or arranged relative to the magnetic structure to, e.g., structurally support, enable operation of, or otherwise incorporate the magnetic structure into the magnetic device, etc. The associated circuit may be electrically connected to the magnetic structure to receive, provide, condition or process of signals of the magnetic device.
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439.发明授权公开(公告)号：US11101638B2
公开(公告)日：2021-08-24
申请号：US16153496
申请日：2018-10-05
Applicant: Analog Devices Global Unlimited Company
Inventor： Rajiv Nadig
Abstract: Provided herein are semiconductor dies including multiple controllers for operating over an extended temperature range. In certain embodiments, a semiconductor die includes multiple circuit modules, a temperature sensor that generates a detected temperature signal, an interface that communicates with an external host, a primary controller coupled to the interface and operable to control the circuit modules, and a secondary controller coupled to the interface. In response to the detected temperature signal indicating that the temperature of the semiconductor die exceeds a threshold temperature, the primary controller enables the secondary controller, which in turn disables the primary controller and at least a portion of the plurality of circuit modules to reduce heat dissipation.
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公开(公告)号：US11082051B2
公开(公告)日：2021-08-03
申请号：US15977171
申请日：2018-05-11
Applicant: Analog Devices Global Unlimited Company
Inventor： Gordon John Allan
Abstract: Apparatus and methods for timing offset compensation of frequency synthesizers are provided herein. In certain embodiments, an electronic system includes a frequency synthesizer, such as a fractional-N phase-locked loop (PLL), which generates an output clock signal based on timing of a reference clock signal. Additionally, the electronic system includes an integer PLL configured to compensate for a timing offset, such as a phase offset and/or frequency offset, of the frequency synthesizer based on timing of the output clock signal.
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