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289 条记录 (耗时 0.036 秒)

    DC/DC boost converter with resistorless current sensing
    41.
    发明授权
    DC/DC boost converter with resistorless current sensing 有权
    DC / DC升压转换器，无电阻电流检测

    公开(公告)号：US07768242B2

    公开(公告)日：2010-08-03

    申请号：US11865645

    申请日：2007-10-01

    申请人： Dazhi Wei ,  Alan L. Westwick

    发明人： Dazhi Wei ,  Alan L. Westwick

    IPC分类号： G05F1/10 ,  H02H7/10

    CPC分类号： H02M3/156 ,  H02M2001/0009

    摘要： A DC to DC boost converter circuit receives a DC input voltage and converts it to a DC output voltage at a different voltage level than the DC input voltage. The DC to DC boost converter includes a switching power converter for receiving the input voltage on an input and converting the input voltage to an output as the DC output voltage in response to pulse control signals. A switching controller generates the pulse control signals during a switching cycle. Current sensing circuitry limits a current passing through the switching power converter. The current sensing circuitry generates an overload signal when the current exceeds a reference value. The current sensing circuitry sensing the current with a current sensing resistor having a size of at least approximately 500 ohms.

    摘要翻译： DC-DC升压转换器电路接收DC输入电压并将其转换成与DC输入电压不同的电压电平的DC输出电压。 DC-DC升压转换器包括用于接收输入端的输入电压的开关电源转换器，并且响应于脉冲控制信号将输入电压转换为作为DC输出电压的输出。 开关控制器在开关周期内产生脉冲控制信号。 电流检测电路限制了通过开关电源转换器的电流。 当电流超过参考值时，电流检测电路产生过载信号。 电流感测电路用具有至少约500欧姆的尺寸的电流感测电阻感测电流。

    Method and apparatus for emulating rewritable memory with non-rewritable memory in an MCU
    42.
    发明授权
    Method and apparatus for emulating rewritable memory with non-rewritable memory in an MCU 有权
    用于在MCU中仿真具有不可重写存储器的可重写存储器的方法和装置

    公开(公告)号：US07680976B2

    公开(公告)日：2010-03-16

    申请号：US11695014

    申请日：2007-03-31

    申请人： Ka Y. Leung

    发明人： Ka Y. Leung

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0238 ,  G06F12/0246 ,  G06F2212/1056 ,  G06F2212/7202

    摘要： An integrated circuit having an embedded multiple time programmable memory includes a processing core for executing stored instructions with a data memory and a non volatile memory. The non-volatile memory block provides for storage of program instructions and includes a plurality of blocks of non-volatile memory, each of which can be written to once and read from many times and each having a size that is equal to or less than a program memory address space addressable by the processing core for output of data there from. It also includes a reserve storage location for storing a status word defining the one of the plurality of blocks addressable by the processing core, the status word operable to be changed in response to external signals when another of the plurality of blocks is to be selected, such that once another of the plurality of blocks is selected, the status word cannot indicate as addressable by the processing core a prior one of the plurality of blocks that was defined by the status word as being previously addressable by the processing core.

    摘要翻译： 具有嵌入式多时间可编程存储器的集成电路包括用于使用数据存储器和非易失性存储器执行存储的指令的处理核心。 非易失性存储器块提供程序指令的存储，并且包括多个非易失性存储器块，每个块可被写入一次并且从多次读取并且每个具有等于或小于 程序存储器地址空间可由处理核心寻址，用于输出数据。 它还包括一个保留存储位置，用于存储定义可由处理核心寻址的多个块中的一个的状态字，该状态字可操作以在多个块中的另一个块被选择时响应于外部信号被改变， 使得一旦选择了多个块中的另一个，则状态字不能被处理核心指示，该状态字由状态字定义为可由处理核心预先寻址的多个块中的先前的一个块。

    Bar code scanner and software interface interlock for performing encrypted handshaking and for disabling the scanner or input device in case of handshaking operation failure
    45.
    发明授权
    Bar code scanner and software interface interlock for performing encrypted handshaking and for disabling the scanner or input device in case of handshaking operation failure 有权
    条形码扫描器和软件界面互锁，用于执行加密握手和在握手操作失败的情况下禁用扫描仪或输入设备

    公开(公告)号：US07257619B2

    公开(公告)日：2007-08-14

    申请号：US10881725

    申请日：2004-06-29

    申请人： Jeffry Jovan Philyaw

    发明人： Jeffry Jovan Philyaw

    IPC分类号： G06F15/16 ,  G06F15/173

    CPC分类号： G06F17/30876 ,  G06F3/002 ,  G06F17/30879 ,  G06F17/30887 ,  G06F21/00 ,  G06Q30/02 ,  H04H20/93 ,  H04L29/06 ,  H04L29/12009 ,  H04L29/12047 ,  H04L29/12594 ,  H04L61/15 ,  H04L61/301 ,  H04L67/02 ,  H04L67/20 ,  H04L67/26 ,  H04L67/306 ,  H04L69/329 ,  H04N21/4622 ,  H04N21/4782 ,  H04N21/812

    摘要： An interlocking architecture for a software interface and a bar code scanner. Upon power-up, a handshaking operation is performed between a scanner (1600) having a scanner processor (2600) and a computer processor (2612) of a computer (302) based upon the code stored in the NV memory (2602) of the scanner (1600) and a unique code associated with the software interface running on the computer (302). A wedge (1608) is provided as an interface mechanism for the scanner (1600) and a keyboard (1610) to a keyboard port (2500) of the computer (302). The handshaking occurs through the wedge (1608) via a keyboard interface (2610) to the processor (2600) such that a successful handshake directs the processor (2600) to engage a switch (2604) which enables power to a sensing head (2606) for read optically encoded information. The software interface operates from a computer memory (2614) associated with the processor (2612) whereby an unsuccessful handshake using unique number of the software interface by the processor (2612) sends a disabling signal though the keyboard circuit (2618) through the wedge (1608) to the scanner processor (2600) to disengage the switch (2604) to drop power to the sensor head (2606). The handshaking operation is performed on a regular basis during system power-up to ensure that the original software interface and scanner (1600) are still in use.

    摘要翻译： 用于软件界面和条形码扫描器的互锁架构。 在上电时，基于存储在NV存储器（2602）中的代码，在具有扫描器处理器（2600）的扫描仪（1600）和计算机（302）的计算机处理器（2612）之间执行握手操作 扫描器（1600）和与在计算机（302）上运行的软件接口相关联的唯一代码。 提供楔形物（1608）作为扫描仪（1600）的接口机构和与计算机（302）的键盘端口（2500）的键盘（1610）。 握手通过楔子（1608）经由键盘接口（2610）发送到处理器（2600），使得成功的握手指示处理器（2600）接合开关（2604），开关（2604）使得能够向感测头（2606）供电， 用于读取光编码信息。 软件接口从与处理器（2612）相关联的计算机存储器（2614）操作，由此由处理器（2612）使用唯一数量的软件接口的不成功的握手通过键盘（2618）通过键盘电路（2618）发送禁用信号 1608）到扫描器处理器（2600）以使开关（2604）分离以将功率降低到传感器头（2606）。 在系统上电期间，定期执行握手操作，以确保原始软件界面和扫描仪（1600）仍在使用中。

    DMA controller that restricts ADC from memory without interrupting generation of digital words when CPU accesses memory
    46.
    发明授权
    DMA controller that restricts ADC from memory without interrupting generation of digital words when CPU accesses memory 失效
    DMA控制器在CPU访问存储器时不会中断数字字的产生，从而限制ADC的内存

    公开(公告)号：US07188199B2

    公开(公告)日：2007-03-06

    申请号：US10752740

    申请日：2004-01-07

    申请人： Kafai Leung ,  Ka Y. Leung

    发明人： Kafai Leung ,  Ka Y. Leung

    IPC分类号： G06F3/00 ,  H03M1/12

    CPC分类号： H03M1/1057 ,  G06F13/28 ,  H03M1/468

    摘要： DMA controller for mixed signal device. A mixed signal integrated circuit with memory control is disclosed. A data conversion circuit is provided that is operable to receive an analog input signal and convert discrete samples thereof at a predetermined sampling rate to a digital representations thereof as a plurality of digital words. A memory stores the digital words generated by the data conversion circuit. A processor is included on the integrated circuit and operable to access the memory to output select ones of the digital words for processing thereof in accordance with a predetermined processing algorithm. A memory access controller controls access to the memory by the data conversion circuit and the processor. The memory access controller is operable to restrict access to the memory by the data conversion circuit without interrupting the generation of digital words therefrom when the processor is accessing the memory, and allowing access to the memory by the data conversion circuitry when the processor is not accessing the memory, such that the data conversion circuit can transfer currently generated digital words and previously generated and non stored digital words for storage in said memory upon gaining access thereto.

    摘要翻译： DMA控制器用于混合信号装置。 公开了一种具有存储器控制的混合信号集成电路。 提供了一种数据转换电路，其可操作以接收模拟输入信号并将其以预定采样率的离散采样转换为其数字表示作为多个数字字。 存储器存储由数据转换电路产生的数字字。 处理器被包括在集成电路中并且可操作以访问存储器以根据预定的处理算法输出用于处理的数字字的选择数字字。 存储器访问控制器通过数据转换电路和处理器控制对存储器的访问。 存储器访问控制器可操作以在处理器访问存储器时限制对数据转换电路对存储器的访问，而不会在处理器访问存储器时中断数字字的产生，并且当处理器未访问时允许数据转换电路访问存储器 存储器，使得数据转换电路可以传送当前生成的数字字和先前生成的和未存储的数字字，以便在访问存储器时存储在所述存储器中。

    Startup via FB pin regulation
    47.
    发明授权
    Startup via FB pin regulation 有权
    通过FB引脚调节启动

    公开(公告)号：US07088600B2

    公开(公告)日：2006-08-08

    申请号：US10915906

    申请日：2004-08-11

    申请人： Gustavo J. Mehas ,  James W. Leith ,  Brandon D. Day

    发明人： Gustavo J. Mehas ,  James W. Leith ,  Brandon D. Day

    IPC分类号： H02M1/00

    CPC分类号： H02M1/36 ,  Y10S323/901

    摘要： An apparatus for reducing surge currents during startup of a voltage regulator is disclosed that includes circuitry for maintaining a voltage at an FB pin of the voltage regulator substantially equivalent to an output voltage of the voltage regulator.

    摘要翻译： 公开了一种用于在电压调节器启动期间减小浪涌电流的装置，其包括用于将电压调节器的FB引脚上的电压维持在基本上等于电压调节器的输出电压的电路。

    Method and apparatus for generating unique ID packets in a distributed processing system
    48.
    发明授权
    Method and apparatus for generating unique ID packets in a distributed processing system 有权
    用于在分布式处理系统中生成唯一ID分组的方法和装置

    公开(公告)号：US07035271B1

    公开(公告)日：2006-04-25

    申请号：US09879571

    申请日：2001-06-12

    申请人： Diane L. Peterson

    发明人： Diane L. Peterson

    IPC分类号： H04L12/28

    CPC分类号： H04L29/06 ,  H04L69/08

    摘要： Method and apparatus for generating unique id packets in a distributed processing system. A method for facilitating processing over a network includes generating at a server location on the network a pointer that defines an information profile on the network. The pointer is then associated with the information profile, and the pointer and the associated information profile transmitted to at least two locations on the network. The pointer can then be transmitted to one of the at least two locations on the network from another location on the network during a processing operation on the network for the purpose of processing a network transaction at the receiving one of the at least two locations on the network, which network transaction requires the associated information profile, such that only transmission of the pointer is required for the processing operation.

    摘要翻译： 在分布式处理系统中生成唯一id数据包的方法和装置。 用于促进通过网络进行处理的方法包括在网络上的服务器位置生成在网络上定义信息简档的指针。 指针然后与信息简档相关联，并且指针和相关联的信息简档被发送到网络上的至少两个位置。 然后可以在网络上的处理操作期间将指针从网络上的另一位置发送到网络上的至少两个位置中的一个，以便在网络上的至少两个位置的接收一个处处理网络事务 网络，哪个网络事务需要相关联的信息简档，使得仅处理操作需要传输指针。

    Golf putter grip having flat surface areas
    50.
    发明授权
    Golf putter grip having flat surface areas 有权

    公开(公告)号：US09700772B2

    公开(公告)日：2017-07-11

    申请号：US14716703

    申请日：2015-05-19

    申请人： Louis Goldfader

    发明人： Louis Goldfader

    IPC分类号： A63B53/14 ,  A63B53/00 ,  A63B69/36 ,  A63B60/12

    CPC分类号： A63B53/14 ,  A63B53/007 ,  A63B60/12 ,  A63B69/3676

    摘要： A golf club grip for attachment to a shaft of a golf club, the grip comprising an elongated body including a proximate end, a distal end, a first flat surface, the first flat surface having a proximate edge, a distal edge, a first long edge, and a second long edge, a second flat surface, the second flat surface having a proximate edge, a distal edge, a first long edge, and a second long edge, a first curved surface having an outwardly convex curvature, the first curved surface having a curved edge between the first long edge of the first flat surface and the first long edge of the second flat surface, and a second curved surface having an outwardly convex curvature, the second curved surface having a curved edge between the second long edge of the first flat surface and the second long edge of the second flat surface.