APPARATUS AND CONTROL INTERFACE THEREFOR
    41.
    发明申请
    APPARATUS AND CONTROL INTERFACE THEREFOR 有权
    设备和控制接口

    公开(公告)号:US20090274207A1

    公开(公告)日:2009-11-05

    申请号:US11574867

    申请日:2004-09-07

    CPC classification number: G06F13/4291

    Abstract: An apparatus comprises a number of sub-systems and a control interface operably coupled to sub-systems for routeing data therebetween. A strobe generation function is operably coupled to the control interface and configured to generate a plurality of different strobe signals to differentiate between different intended receiving devices. Thus, different strobe signals may be multiplexed onto a single control interface link, based on a pulse width or voltage magnitude characteristics of the respective strobe signals. A strobe decoder function is operably coupled to the control interface and configured to decode a plurality of different strobe signals to differentiate between triggering sub-systems on receiving devices.

    Abstract translation: 一种装置包括多个子系统和可操作地耦合到子系统的控制接口,用于在其间路由数据。 选通生成功能可操作地耦合到控制接口并且被配置为生成多个不同的选通信号以区分不同的预期接收设备。 因此,可以基于相应选通信号的脉冲宽度或电压幅度特性,将不同的选通信号复用到单个控制接口链路上。 选通解码器功能可操作地耦合到控制接口并且被配置为解码多个不同的选通信号以区分接收设备上的触发子系统。

    Method for sampling data and apparatus therefor
    43.
    发明授权
    Method for sampling data and apparatus therefor 有权
    数据采集​​方法及其设备

    公开(公告)号:US08923465B2

    公开(公告)日:2014-12-30

    申请号:US12988831

    申请日:2008-05-19

    CPC classification number: H04L7/0337

    Abstract: A semiconductor device comprises sampling logic, comprising: input sample path selection logic arranged to enable at least one input sample path; sampler logic arranged to receive and sample an input data signal in a serial data stream in accordance with a phase of the at least one enabled input sample path; and transition detection logic arranged to detect transitions within the received input data signal. The input sample path selection logic is further arranged, upon detection of a transition within the received input data signal, to determine if the phase of the at least one input sample path is a phase having a largest window between logic values; and if it is determined that the phase of the at least one input sample path is not the phase having a largest window between logic values, to enable at least one input sample path comprising a more appropriate phase.

    Abstract translation: 半导体器件包括采样逻辑,包括:输入采样路径选择逻辑,布置成使能至少一个输入采样路径; 采样器逻辑,被布置为根据所述至少一个使能的输入采样路径的相位接收和采样串行数据流中的输入数据信号; 以及转移检测逻辑,被布置成检测所接收的输入数据信号内的转变。 在检测到所接收的输入数据信号中的转换之后,进一步布置输入采样路径选择逻辑,以确定至少一个输入采样路径的相位是否是在逻辑值之间具有最大窗口的相位; 并且如果确定所述至少一个输入采样路径的相位不是在逻辑值之间具有最大窗口的相位,以使得能够进行包括更适当相位的至少一个输入采样路径。

    Method and apparatus to receive location information in a diversity enabled receiver
    44.
    发明授权
    Method and apparatus to receive location information in a diversity enabled receiver 有权
    在分集使能的接收机中接收位置信息的方法和装置

    公开(公告)号:US08310362B2

    公开(公告)日:2012-11-13

    申请号:US12532753

    申请日:2007-03-26

    CPC classification number: H04B1/3805 H04B7/0857 H04B7/0871

    Abstract: A method of processing location information on a mobile device which includes a primary receiver for receiving a primary signal; a diversity receiver for receiving a diversity signal or location information; a diversity combiner which can combine primary and diversity signals to form a combined signal; and a first processing unit for processing the combined signal; the method comprising the steps of: identifying whether the device is in a location mode or a diversity mode; if the device is in location mode, disabling the diversity combiner; passing the output from the primary receiver directly to the first processing unit; and passing location information from the diversity receiver to a location processing unit.

    Abstract translation: 一种在移动设备上处理位置信息的方法,包括:用于接收主信号的主接收机; 用于接收分集信号或位置信息的分集接收机; 可以组合主要和分集信号以形成组合信号的分集组合器; 以及用于处理所述组合信号的第一处理单元; 该方法包括以下步骤:识别设备是处于位置模式还是分集模式; 如果设备处于定位模式,则禁用分集组合器; 将来自主接收机的输出直接传递到第一处理单元; 以及将位置信息从分集接收机传递到位置处理单元。

    Electronic device, integrated circuit and method therefor
    45.
    发明授权
    Electronic device, integrated circuit and method therefor 有权
    电子设备,集成电路及其方法

    公开(公告)号:US08306172B2

    公开(公告)日:2012-11-06

    申请号:US12522043

    申请日:2007-01-09

    CPC classification number: H04L7/0338 H04L7/042

    Abstract: A wireless communication device comprises a number of sub-systems and clock generation logic arranged to generate at least one clock signal to be applied to the number of sub-systems. One of the number of sub-systems comprises sampling logic for receiving input data and performing initial sampling on an input data bit using multiple separated phases of a clock period of the at least one clock signal applied to the sampling logic thereby producing multiple phase separated sampled outputs of the input data bit. The sampling logic is configured to perform a number of re-sampling operations on the multiple phase separated sampled outputs at a number of intermediate phases thereby producing multiple phase separated intermediate sampled outputs prior to performing a final sample of the multiple phase separated intermediate sampled outputs at a single phase of the at least one clock signal to produce a sampled input data signal.

    Abstract translation: 无线通信设备包括多个子系统和时钟生成逻辑,其布置成生成要应用于子系统数量的至少一个时钟信号。 子系统的数量之一包括用于接收输入数据的采样逻辑,并且使用施加到采样逻辑的至少一个时钟信号的时钟周期的多个分离相位对输入数据位执行初始采样,从而产生多相分离采样 输入数据位的输出。 采样逻辑被配置为在多个中间相位的多相分离采样输出上执行多个重采样操作,从而在执行多相分离中间采样输出的最终采样之前产生多相分离中间采样输出 所述至少一个时钟信号的单相以产生采样的输入数据信号。

    Method and device for transmitting a sequence of transmission bursts
    46.
    发明授权
    Method and device for transmitting a sequence of transmission bursts 有权
    用于发送传输脉冲序列的方法和设备

    公开(公告)号:US08175548B2

    公开(公告)日:2012-05-08

    申请号:US11910067

    申请日:2005-03-30

    CPC classification number: H04W56/00 H04B7/2681 H04J3/0682 H04W72/12

    Abstract: Methods and device for transmitting a sequence of transmission bursts in a wireless device. The method includes transmitting a sequence of transmission bursts according to a transmission schedule. The method is characterized by: receiving, at a radio frequency integrated circuit, prior to a transmission of at least one transmission burst of the sequence, information representative of the timing of the transmission of the at least one transmission burst; and generating timing signals, by the radio frequency integrated circuit that implement the transmission schedule. A wireless device includes a base band integrated circuit adapted to determine a transmission schedule of a sequence of transmission bursts. The wireless device is characterized by including a radio frequency integrated circuit that is adapted receive information representative of the timing schedule and to autonomously control a transmission of the sequence of transmission bursts.

    Abstract translation: 用于在无线设备中发送传输突发序列的方法和设备。 该方法包括根据传输调度传输一系列传输脉冲串。 该方法的特征在于:在射频集成电路接收传输该序列的至少一个传输脉冲串之前,表示至少一个传输脉冲串的传输定时的信息; 并通过实现传输调度的射频集成电路产生定时信号。 无线设备包括适于确定传输脉冲序列的传输调度的基带集成电路。 该无线设备的特征在于包括一个射频集成电路,其被适配为代表定时调度的接收信息,并且自主地控制传输脉冲序列的传输。

    Ramping in multimode transmitters using primed filters
    47.
    发明授权
    Ramping in multimode transmitters using primed filters 有权
    使用底层滤波器在多模发射机中斜坡

    公开(公告)号:US08094755B2

    公开(公告)日:2012-01-10

    申请号:US11994766

    申请日:2005-07-04

    CPC classification number: H04L27/2017 H03G3/3047 H04L27/0008

    Abstract: A modulation system can switch between two modulation modes. In order to comply with limits on peak power in spectral bands outside the RF operating one the transmitter is required to ramp down to a condition of minimal power. To avoid fixed ramping and trailing bits, the transmitting signal is subjected to FIR filtering. The two FIR filters are primed with a sequence using a parallel input mode before serially entering the information data.

    Abstract translation: 调制系统可以在两种调制模式之间切换。 为了符合射频外的频谱带峰值功率的限制,发射机需要降低到最小功率的条件。 为了避免固定的斜坡和尾随位,发送信号经过FIR滤波。 在串行输入信息数据之前,使用并行输入模式对两个FIR滤波器进行初始化。

    ELECTRONIC DEVICE, INTEGRATED CIRCUIT AND METHOD FOR SELECTING OF AN OPTIMAL SAMPLING CLOCK PHASE
    48.
    发明申请
    ELECTRONIC DEVICE, INTEGRATED CIRCUIT AND METHOD FOR SELECTING OF AN OPTIMAL SAMPLING CLOCK PHASE 有权
    电子设备,集成电路和选择最佳采样时钟相位的方法

    公开(公告)号:US20110142169A1

    公开(公告)日:2011-06-16

    申请号:US12522047

    申请日:2007-01-09

    CPC classification number: H04L7/042 H04B1/005 H04B1/70753 H04L7/0337

    Abstract: An electronic device comprises a number of sub-systems coupled via an interface. One of the number of sub-systems comprises logic for receiving a frame of input data having a plurality of phases on respective data paths. The electronic device further comprises logic for performing cross correlation on the received input data with a pre-determined bit pattern, operably coupled to selection logic, for selecting a single phase from the plurality of phases sent to the interface to sample the received input data in a middle region of a data bit period in response to the cross correlation.

    Abstract translation: 电子设备包括通过接口耦合的多个子系统。 子系统中的一个包括用于接收在相应数据路径上具有多个相位的输入数据帧的逻辑。 电子设备还包括用于以可选择地耦合到选择逻辑的预定比特模式对所接收的输入数据执行互相关的逻辑,用于从发送到接口的多个相位中选择单相以对接收到的输入数据进行采样 响应于互相关的数据位周期的中间区域。

    METHOD FOR SAMPLING DATA AND APPARATUS THEREFOR
    49.
    发明申请
    METHOD FOR SAMPLING DATA AND APPARATUS THEREFOR 有权
    采样数据及其设备的方法

    公开(公告)号:US20110043253A1

    公开(公告)日:2011-02-24

    申请号:US12988831

    申请日:2008-05-19

    CPC classification number: H04L7/0337

    Abstract: A semiconductor device comprises sampling logic, comprising: input sample path selection logic arranged to enable at least one input sample path; sampler logic arranged to receive and sample an input data signal in a serial data stream in accordance with a phase of the at least one enabled input sample path; and transition detection logic arranged to detect transitions within the received input data signal. The input sample path selection logic is further arranged, upon detection of a transition within the received input data signal, to determine if the phase of the at least one input sample path is a phase having a largest window between logic values; and if it is determined that the phase of the at least one input sample path is not the phase having a largest window between logic values, to enable at least one input sample path comprising a more appropriate phase.

    Abstract translation: 半导体器件包括采样逻辑,包括:输入采样路径选择逻辑,布置成使能至少一个输入采样路径; 采样器逻辑,被布置为根据所述至少一个使能的输入采样路径的相位接收和采样串行数据流中的输入数据信号; 以及转移检测逻辑,被布置成检测所接收的输入数据信号内的转变。 在检测到所接收的输入数据信号中的转换之后,进一步布置输入采样路径选择逻辑,以确定至少一个输入采样路径的相位是否是在逻辑值之间具有最大窗口的相位; 并且如果确定所述至少一个输入采样路径的相位不是在逻辑值之间具有最大窗口的相位,以使得能够进行包括更适当相位的至少一个输入采样路径。

    WIRELESS COMMUNICATION UNIT, INTEGRATED CIRCUIT AND METHOD OF POWER CONTROL THEREIN
    50.
    发明申请
    WIRELESS COMMUNICATION UNIT, INTEGRATED CIRCUIT AND METHOD OF POWER CONTROL THEREIN 有权
    无线通信单元,集成电路及其功率控制方法

    公开(公告)号:US20100298035A1

    公开(公告)日:2010-11-25

    申请号:US12671233

    申请日:2007-08-09

    Abstract: A wireless communication unit comprises a transmitter having a power amplifier and a feedback path operably coupled to the power amplifier. The feedback path comprises a coupler for feeding back a portion of a signal to be transmitted and a detector for detecting a power level of the fed back signal. A controller provides a ramp signal to the power amplifier that controls an amplitude characteristic of the signal to be transmitted. Averaging logic is operably coupled to the detector and arranged to average the detected power level over a first period. Comparison logic is operably coupled to the averaging logic and arranged to compare the average detected power level with a reference value. The controller is operably coupled to the comparison logic and arranged to scale a ramp signal applied to the power amplifier in response to the comparison.

    Abstract translation: 无线通信单元包括具有功率放大器和可操作地耦合到功率放大器的反馈路径的发射机。 反馈路径包括用于反馈要发送的信号的一部分的耦合器和用于检测反馈信号的功率电平的检测器。 控制器向功率放大器提供斜坡信号,该功率放大器控制要发送的信号的幅度特性。 平均逻辑可操作地耦合到检测器并且被布置成在第一周期内平均检测到的功率电平。 比较逻辑可操作地耦合到平均逻辑并且被布置成将平均检测到的功率电平与参考值进行比较。 控制器可操作地耦合到比较逻辑,并且被布置为响应于比较来施加到功率放大器的斜坡信号。

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