公开(公告)号：US20120189880A1

公开(公告)日：2012-07-26

申请号：US13351252

申请日：2012-01-17

Applicant: Gerhard Ingmar Meijer ,  Patrick Ruch

Inventor： Gerhard Ingmar Meijer ,  Patrick Ruch

IPC: H01M8/20 ,  H01M2/40

CPC classification number: H01M10/42

Abstract: An electrochemical power delivery voltage regulator. The regulator includes one or more fluid circuits having a first electrolyte solution with a primary redox couple and a secondary redox couple; and a second electrolyte solution with a further primary redox couple; a polyelectrode in contact with the first electrolyte solution; a further electrode in contact with the second electrolyte solution; and control means coupled to control a relative concentration of electroactive species of the secondary redox couple and thereby impact a mixed potential at the polyelectrode, such as to regulate a supply voltage of the electrochemical power delivery voltage regulator, in operation. The invention further concerns a corresponding method of voltage regulation and a system comprising such an electrochemical power and electrical consumers with consumer fluid circuits in fluid communication with respective one or more fluid circuits of the electrochemical power delivery voltage regulator.

Abstract translation: 一种电化学电力输送电压调节器。 调节器包括一个或多个流体回路，其具有具有初级氧化还原对和次级氧化还原对的第一电解质溶液; 和具有另外的原始氧化还原对的第二电解质溶液; 与第一电解质溶液接触的聚电极; 与第二电解质溶液接触的另一电极; 以及控制装置，其耦合以控制次级氧化还原对的电活性物质的相对浓度，从而在操作中影响多电极处的混合电位，例如调节电化学电力输送电压调节器的电源电压。 本发明还涉及电压调节的相应方法，以及包括这种电化学电力和电消耗器的系统，消费者流体回路与电化学电力输送电压调节器的相应一个或多个流体回路流体连通。

公开(公告)号：US07825486B2

公开(公告)日：2010-11-02

申请号：US12353315

申请日：2009-01-14

Applicant: Siegfried Friedrich Karg ,  Gerhard Ingmar Meijer

Inventor： Siegfried Friedrich Karg ,  Gerhard Ingmar Meijer

IPC: H01L43/10

CPC classification number: H01L43/08 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147

Abstract: A programmable magnetoresistive memory cell. The memory cell has a magnetic element that includes a first and a second ferromagnetic layer. The first and second ferromagnetic layers are separated by a non-ferromagnetic and preferably electrically insulating spacer layer. The data bit is read out by measuring the electrical resistance across the magnetic element. The memory cell further includes: a third ferromagnetic layer having a well-defined magnetization direction and a resistance switching material having a carrier density. The carrier density can be altered by causing an ion concentration to become altered by means of an applied electrical voltage signal. Thus, the carrier density can be switched between a first and second state.

Abstract translation: 可编程磁阻存储单元。 存储单元具有包括第一和第二铁磁层的磁性元件。 第一铁磁层和第二铁磁层由非铁磁性并且优选电绝缘间隔层分开。 通过测量磁性元件两端的电阻来读出数据位。 存储单元还包括：具有明确限定的磁化方向的第三铁磁层和具有载流子密度的电阻切换材料。 可以通过使施加的电压信号使离子浓度变化而改变载流子密度。 因此，可以在第一和第二状态之间切换载流子密度。

公开(公告)号：US20090308313A1

公开(公告)日：2009-12-17

申请号：US12540949

申请日：2009-08-13

Applicant: Rolf Allenspach ,  Johannes G. Bednorz ,  Gerhard Ingmar Meijer ,  Chung Hon Lam ,  Richard Stutz ,  Daniel Widmer

Inventor： Rolf Allenspach ,  Johannes G. Bednorz ,  Gerhard Ingmar Meijer ,  Chung Hon Lam ,  Richard Stutz ,  Daniel Widmer

IPC: B05C11/00

CPC classification number: G11C13/0007 ,  G11C2213/31 ,  H01L21/31691 ,  H01L27/101 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/147 ,  H01L45/1625

Abstract: A microelectronic device or non-volatile resistance switching memory comprising the switching material for storing digital information. A process includes a step of depositing the switching material by a CMOS deposition technique at a temperature lower than 400° C.

Abstract translation: 一种微电子器件或非易失性电阻切换存储器，包括用于存储数字信息的切换材料。 一种方法包括通过CMOS沉积技术在低于400℃的温度下沉积开关材料的步骤。

公开(公告)号：US20090180728A1

公开(公告)日：2009-07-16

申请号：US12353517

申请日：2009-01-14

Applicant: Gerhard Ingmar Meijer ,  Thilo Eermann Curt-Stoferle

Inventor： Gerhard Ingmar Meijer ,  Thilo Eermann Curt-Stoferle

IPC: G02F1/295 ,  G02B6/10

CPC classification number: G02F1/19 ,  G02F1/035 ,  G02F1/1523 ,  G02F1/3132 ,  G02F2203/15

Abstract: An electro-optical device having a non-volatile programmable refractive index. The device includes: a waveguiding structure with waveguiding material, the waveguiding structure defining an optical beam path, where the waveguiding structure includes a transition metal oxide with oxygen vacancies that migrate when exposed to an electric field; and a plurality of electrodes for applying an electric field to a region including the transition metal oxide with oxygen vacancies; where the transition metal oxide and the electrodes are arranged such that under the applied electric field the oxygen vacancies migrate in a direction that has a component which is radial relative to a center of the beam path. Further, there is provided a method for making the electro-optical device, including: fabricating the waveguiding structure; positioning a plurality of electrodes for application of an electric field; and arranging the transition metal oxide and the electrodes.

Abstract translation: 具有非易失性可编程折射率的电光装置。 所述装置包括：具有波导材料的波导结构，所述波导结构限定光束路径，其中所述波导结构包括当暴露于电场时迁移的氧空位的过渡金属氧化物; 以及多个电极，用于向包括具有氧空位的过渡金属氧化物的区域施加电场; 其中过渡金属氧化物和电极被布置成使得在施加的电场下，氧空位沿具有相对于光束路径的中心径向的分量的方向迁移。 此外，提供了一种制造该电光装置的方法，包括：制造该波导结构; 定位用于施加电场的多个电极; 并且设置过渡金属氧化物和电极。

公开(公告)号：US20090174430A1

公开(公告)日：2009-07-09

申请号：US12350329

申请日：2009-01-08

Applicant: Siegfried Friedrich Karg ,  Gerhard Ingmar Meijer

Inventor： Siegfried Friedrich Karg ,  Gerhard Ingmar Meijer

IPC: H03K19/177 ,  H03K19/0944

CPC classification number: H03K19/1778 ,  H01L27/11803 ,  H03K19/17728

Abstract: A complementary logic element including first and second transistor elements. The first and second gate electrodes of the two transistor elements are electrically parallel to form a common gate. Both the coupling layers of the first and the second transistor element include a resistance switching material, a conductivity of which may be altered by causing an ion concentration to alter if an electrical voltage signal of an appropriate polarity is applied. The first and second transistor elements also include an ion conductor layer that is capable of accepting ions from the coupling layer and of releasing ions into the coupling layer. The coupling layers and ion conductor layers are such that the application of an electrical signal of a given polarity to the gate enhances the electrical conductivity of the first coupling layer and diminishes the electrical conductivity of the second, or vice versa.

Abstract translation: 互补逻辑元件，包括第一和第二晶体管元件。 两个晶体管元件的第一和第二栅极电极并联以形成公共栅极。 第一和第二晶体管元件的耦合层都包括电阻切换材料，如果施加了适当极性的电压信号，其电导率可以通过使离子浓度改变而改变。 第一和第二晶体管元件还包括能够接受来自耦合层的离子并将离子释放到耦合层中的离子导体层。 耦合层和离子导体层使得向栅极施加给定极性的电信号增强了第一耦合层的电导率并且减小了第二耦合层的电导率，反之亦然。

公开(公告)号：US07465952B2

公开(公告)日：2008-12-16

申请号：US11239495

申请日：2005-09-29

Applicant: Santos F. Alvarado ,  Johannes Georg Bednorz ,  Gerhard Ingmar Meijer

Inventor： Santos F. Alvarado ,  Johannes Georg Bednorz ,  Gerhard Ingmar Meijer

IPC: H01L47/00 ,  H01L29/06 ,  G11C11/00

CPC classification number: G11C13/0007 ,  G11C13/0004 ,  G11C19/00 ,  G11C2213/31 ,  H01L27/24

Abstract: A memory element comprises a first number of electrodes and a second number of electrically conducting channels between sub-groups of two of said electrodes, the channels exhibiting an electrical resistance that is reversibly switchable between different states, wherein the first number is larger than two and the second number is larger than the first number divided by two. The electrically conducting channels may be provided in transition metal oxide material, which exhibits a reversibly switchable resistance that is attributed to a switching phenomenon at the interfaces between the electrodes and the transition metal oxide material.

Abstract translation: 存储元件包括在两个所述电极的子组之间的第一数量的电极和第二数量的导电通道，所述通道呈现在不同状态之间可逆地切换的电阻，其中第一数量大于2， 第二个数字大于第一个数字除以2。 导电通道可以设置在过渡金属氧化物材料中，其呈现出由电极和过渡金属氧化物材料之间的界面处的切换现象引起的可逆切换电阻。

公开(公告)号：US07324366B2

公开(公告)日：2008-01-29

申请号：US11409440

申请日：2006-04-21

Applicant: Johannes Georg Bednorz ,  Chung Hon Lam ,  Gerhard Ingmar Meijer

Inventor： Johannes Georg Bednorz ,  Chung Hon Lam ,  Gerhard Ingmar Meijer

IPC: G11C11/00

CPC classification number: G11C8/14 ,  G11C11/1655 ,  G11C11/1657

Abstract: A nonvolatile memory array includes a plurality of word lines, a plurality of bit lines, a plurality of source lines, and a plurality of nonvolatile memory cells. Each of at least a subset of the plurality of memory cells has a first terminal connected to one of the plurality of word lines, a second terminal connected to one of the plurality of bit lines, and a third terminal connected to one of the plurality of source lines. At least one of the memory cells includes a bipolar programmable storage element operative to store a logic state of the memory cell, a first terminal of the bipolar programmable storage element connecting to one of a corresponding first one of the bit lines and a corresponding first one of the source lines, and a metal-oxide-semiconductor device including first and second source/drains and a gate. The first source/drain is connected to a second terminal of the bipolar programmable storage element, the second source/drain is adapted for connection to a corresponding second one of the bit lines, and the gate is adapted for connection to a corresponding one of the word lines. For at least a subset of the plurality of memory cells, each pair of adjacent memory cells along a given word line shares either the same bit line or the same source line.

Abstract translation: 非易失性存储器阵列包括多个字线，多个位线，多条源极线和多个非易失性存储器单元。 多个存储单元的至少一个子集中的每一个具有连接到多个字线之一的第一端子，连接到多个位线之一的第二端子和连接到多个位线之一的第三端子 源线。 存储器单元中的至少一个包括可操作以存储存储单元的逻辑状态的双极可编程存储元件，双极可编程存储元件的第一端连接到相应的第一位线之一和相应的第一个 的源极线以及包括第一和第二源极/漏极和栅极的金属氧化物半导体器件。 第一源极/漏极连接到双极可编程存储元件的第二端子，第二源极/漏极适于连接到对应的第二位线，并且栅极适于连接到相应的一个 字线。 对于多个存储器单元的至少一个子集，沿着给定字线的每对相邻存储器单元共享相同的位线或相同的源极线。