公开(公告)号：US08803216B2

公开(公告)日：2014-08-12

申请号：US11277008

申请日：2006-03-20

Applicant: Meng Ding ,  Lei Xue ,  Mark Randolph ,  Chi Chang ,  Robert Bertram Ogle, Jr.

Inventor： Meng Ding ,  Lei Xue ,  Mark Randolph ,  Chi Chang ,  Robert Bertram Ogle, Jr.

IPC: H01L29/788 ,  H01L27/115 ,  H01L21/28 ,  H01L29/792 ,  H01L29/51

CPC classification number: H01L21/28282 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/513 ,  H01L29/7923

Abstract: A memory cell system including providing a substrate, forming a charge-storing stack having silicon-rich nitride on the substrate, and forming a gate on the charge-storing stack.

Abstract translation: 一种存储单元系统，包括提供衬底，在衬底上形成具有富含硅的氮化物的电荷存储堆叠，并在电荷存储堆上形成栅极。

公开(公告)号：US07855114B2

公开(公告)日：2010-12-21

申请号：US12351553

申请日：2009-01-09

Applicant: Wei Zheng ,  Mark Randolph ,  Hidehiko Shiraiwa

Inventor： Wei Zheng ,  Mark Randolph ,  Hidehiko Shiraiwa

IPC: H01L21/336 ,  H01L29/778

CPC classification number: H01L29/792 ,  G11C16/0475 ,  H01L21/28273 ,  H01L21/28282

Abstract: A memory device may include a source region and a drain region formed in a substrate and a channel region formed in the substrate between the source and drain regions. The memory device may further include a first oxide layer formed over the channel region, the first oxide layer having a first dielectric constant, and a charge storage layer formed upon the first oxide layer. The memory device may further include a second oxide layer formed upon the charge storage layer, a layer of dielectric material formed upon the second oxide layer, the dielectric material having a second dielectric constant that is greater than the first dielectric constant, and a gate electrode formed upon the layer of dielectric material.

Abstract translation: 存储器件可以包括形成在衬底中的源极区域和漏极区域以及形成在源极和漏极区域之间的衬底中的沟道区域。 存储器件还可以包括形成在沟道区上的第一氧化物层，第一氧化物层具有第一介电常数，以及形成在第一氧化物层上的电荷存储层。 存储器件还可以包括形成在电荷存储层上的第二氧化物层，形成在第二氧化物层上的介电材料层，介电材料具有大于第一介电常数的第二介电常数，以及栅电极 形成在电介质材料层上。

公开(公告)号：US07750407B2

公开(公告)日：2010-07-06

申请号：US11612265

申请日：2006-12-18

Applicant: Wei Zheng ,  Jean Yang ,  Mark Randolph ,  Ming Kwan ,  Yi He ,  Zhizheng Liu ,  Meng Ding

Inventor： Wei Zheng ,  Jean Yang ,  Mark Randolph ,  Ming Kwan ,  Yi He ,  Zhizheng Liu ,  Meng Ding

IPC: H01L29/76

CPC classification number: H01L27/105 ,  H01L27/11526 ,  H01L27/11531

Abstract: A semiconductor device includes a substrate and a memory cell formed on the substrate. The memory cell includes a word line. The semiconductor device also includes a protection area formed in the substrate, a conductive structure configured to extend the word line to the protection area, and a contact configured to short the word line and the protection area.

Abstract translation: 半导体器件包括衬底和形成在衬底上的存储单元。 存储单元包括字线。 半导体器件还包括形成在衬底中的保护区域，被配置为将字线延伸到保护区域的导电结构以及被配置为使字线和保护区域短路的触点。

公开(公告)号：US20100027350A1

公开(公告)日：2010-02-04

申请号：US12557721

申请日：2009-09-11

Applicant: Ashot MELIK-MARTIROSIAN ,  Ed RUNNION ,  Mark RANDOLPH ,  Meng DING

Inventor： Ashot MELIK-MARTIROSIAN ,  Ed RUNNION ,  Mark RANDOLPH ,  Meng DING

IPC: G11C16/06 ,  G11C7/00 ,  G11C16/04

CPC classification number: G11C16/0475 ,  G11C16/12 ,  G11C16/344 ,  G11C16/3445 ,  G11C16/3454 ,  G11C16/3459

Abstract: A flash memory system configured in accordance with an example embodiment of the invention employs a virtual ground array architecture. During programming operations, target memory cells are biased with a positive source bias voltage to reduce or eliminate leakage current that might otherwise conduct through the target memory cells. A positive source bias voltage may also be applied to target memory cells during verification operations (program verify, soft program verify, erase verify) to reduce or eliminate leakage current that might otherwise introduce errors in the verification operations.

Abstract translation: 根据本发明的示例性实施例配置的闪存系统采用虚拟接地阵列架构。 在编程操作期间，目标存储器单元被偏置为正的源偏置电压，以减少或消除否则可能通过目标存储器单元传导的漏电流。 在验证操作（程序验证，软程序验证，擦除验证）期间，也可以将正源偏置电压施加到目标存储器单元，以减少或消除可能在验证操作中引入错误的泄漏电流。

公开(公告)号：US07630253B2

公开(公告)日：2009-12-08

申请号：US11398415

申请日：2006-04-05

Applicant: Ashot Melik-Martirosian ,  Ed Runnion ,  Mark Randolph ,  Meng Ding

Inventor： Ashot Melik-Martirosian ,  Ed Runnion ,  Mark Randolph ,  Meng Ding

IPC: G11C16/04

CPC classification number: G11C16/0475 ,  G11C16/12 ,  G11C16/344 ,  G11C16/3445 ,  G11C16/3454 ,  G11C16/3459

Abstract: A flash memory system configured in accordance with an example embodiment of the invention employs a virtual ground array architecture. During programming operations, target memory cells are biased with a positive source bias voltage to reduce or eliminate leakage current that might otherwise conduct through the target memory cells. A positive source bias voltage may also be applied to target memory cells during verification operations (program verify, soft program verify, erase verify) to reduce or eliminate leakage current that might otherwise introduce errors in the verification operations.

Abstract translation: 根据本发明的示例性实施例配置的闪存系统采用虚拟接地阵列架构。 在编程操作期间，目标存储器单元被偏置为正的源偏置电压，以减少或消除否则可能通过目标存储器单元传导的漏电流。 在验证操作（程序验证，软程序验证，擦除验证）期间，也可以将正源偏置电压施加到目标存储器单元，以减少或消除可能在验证操作中引入错误的泄漏电流。

公开(公告)号：US07626869B2

公开(公告)日：2009-12-01

申请号：US11745327

申请日：2007-05-07

Applicant: Xuguang Wang ,  Yi He ,  Zhizheng Liu ,  Sung-Yong Chung ,  Darlene G. Hamilton ,  Ashot Melik-Martirosian ,  Gulzar Kathawala ,  Ming Sang Kwan ,  Mark Randolph ,  Timothy Thurgate

Inventor： Xuguang Wang ,  Yi He ,  Zhizheng Liu ,  Sung-Yong Chung ,  Darlene G. Hamilton ,  Ashot Melik-Martirosian ,  Gulzar Kathawala ,  Ming Sang Kwan ,  Mark Randolph ,  Timothy Thurgate

IPC: G11C11/34

CPC classification number: G11C16/16

Abstract: Erasing wordlines at the same time can cause undesirable results because some wordlines are affected by electromagnetic waves of other wordlines. However, other wordlines are not affected because they are next to contacts. Therefore, it can be beneficial to erase wordlines in a multi-phase sequence that allows for erasing wordlines without an impact from other wordlines.

Abstract translation: 同时删除字线可能会导致不良结果，因为某些字线受到其他字线的电磁波的影响。 然而，其他字线不受影响，因为它们在联系人旁边。 因此，删除允许擦除字线而不受其他字线影响的多相序列中的字线可能是有益的。

公开(公告)号：US07339222B1

公开(公告)日：2008-03-04

申请号：US11416551

申请日：2006-05-03

Applicant: Meng Ding ,  Hidehiko Shiraiwa ,  Mark Randolph

Inventor： Meng Ding ,  Hidehiko Shiraiwa ,  Mark Randolph

IPC: H01L27/108

CPC classification number: H01L27/115 ,  H01L27/11517 ,  Y10S257/905

Abstract: According to one exemplary embodiment, a method for fabricating a memory array includes forming a number of trenches in a substrate, where the trenches determine a number of wordline regions in the substrate, where each of the wordline regions is situated between two adjacent trenches, and where each of the wordline regions have a wordline region width. The memory array can be a flash memory array. The method further includes forming a number of bitlines in the substrate, where the bitlines are situated perpendicular to the trenches. The method further includes forming a dielectric region in each of the trenches. The method further includes forming a dielectric stack over the bitlines, wordline regions, and trenches. The method further includes forming a number of wordlines, where each wordline is situated over one of the wordline regions. The wordline region width determines an active wordline width of each of the wordlines.

Abstract translation: 根据一个示例性实施例，一种用于制造存储器阵列的方法包括在衬底中形成多个沟槽，其中沟槽确定衬底中的多个字线区域，其中每个字线区域位于两个相邻的沟槽之间，以及 其中每个字线区域具有字线区域宽度。 存储器阵列可以是闪存阵列。 该方法还包括在衬底中形成多个位线，其中位线垂直于沟槽定位。 该方法还包括在每个沟槽中形成电介质区域。 该方法还包括在位线，字线区域和沟槽之间形成电介质叠层。 该方法还包括形成多个字线，其中每个字线位于一个字线区域上。 字线区域宽度决定每个字线的有效字线宽度。

公开(公告)号：US07299173B2

公开(公告)日：2007-11-20

申请号：US10060511

申请日：2002-01-30

Applicant: Changxue Ma ,  Mark Randolph

Inventor： Changxue Ma ,  Mark Randolph

IPC: G10L21/02

CPC classification number: G10L25/78 ,  G10L25/18

Abstract: Speech presence is detected by first bandpass filtering (141, 143, 145) the speech to split it into banks of sub-bands. A matrix of shift registers (150) store each sub-band of speech. A power determining circuit (259) then determines individual power measurements of the speech stored in each shift register element. A variance combining circuit (160) combines the individual power measurements to provide a variance for the individual shift registers. A comparator circuit (170) finally compares the variance with at least one threshold to indicate whether speech is detected.

Abstract translation: 通过第一次带通滤波（141,143,145）来检测语音存在，将其分解成子带段。 移位寄存器（150）的矩阵存储每个语音子带。 功率确定电路（259）然后确定存储在每个移位寄存器元件中的语音的各个功率测量值。 方差组合电路（160）组合各个功率测量以提供各个移位寄存器的方差。 比较器电路（170）最终将方差与至少一个阈值相比较，以指示是否检测到语音。

公开(公告)号：US06998143B1

公开(公告)日：2006-02-14

申请号：US09914637

申请日：2000-02-28

Applicant: Alexander Sher ,  Mark Randolph Jacobson ,  Bina Vadehra, legal representative

Inventor： Dharam Vir Vadehra, deceased

IPC: A23L1/304

CPC classification number: A61K33/26 ,  A23L33/165

Abstract: An iron fortification complex which may be used to fortify foods and beverages with iron. The complex is formed of ferric ions and caseinate. The complex is sufficiently stable as to be suitable for use in retorted products. However, despite the stability, the iron in the complexes has substantially the same bioavailability as ferrous sulfate.

Abstract translation: 铁强化复合体，可用于强化食物和饮料与铁。 络合物由铁离子和酪蛋白酸盐形成。 复合物足够稳定，适用于蒸馏产品。 然而，尽管稳定性，配合物中的铁具有与硫酸亚铁基本相同的生物利用度。

公开(公告)号：US20050204532A1

公开(公告)日：2005-09-22

申请号：US10920655

申请日：2004-08-17

Applicant: Rosendo Camacho ,  Mark Randolph Robbins

Inventor： Rosendo Camacho ,  Mark Randolph Robbins

IPC: B23P6/00 ,  B60J1/18 ,  B60J7/00 ,  B60J7/12

CPC classification number: B60J1/1815 ,  B60J7/123 ,  Y10T29/49718 ,  Y10T29/49721 ,  Y10T29/4973

Abstract: A process for replacing a first soft-top of a convertible-top of a motor vehicle with a second soft-top includes separating the first soft-top from a headliner of the convertible-top and removing the first soft-top from the convertible top. The second soft-top is selected. The second soft-top has a window at least as large as a window of the first soft-top. A plurality of receptacles are fixed to the second soft-top. The second soft-top is attached to the motor vehicle. The second soft-top is connected directly to the headliner by engaging headliner anchors with the receptacles fixed to the second soft-top.

Abstract translation: 用第二软顶盖替换机动车辆的敞篷车顶部的第一软顶的过程包括将第一软顶与顶篷的顶篷分开，并从可转换顶部移除第一软顶 。 选择第二个软顶。 第二软顶具有至少与第一软顶的窗口一样大的窗口。 多个插座固定到第二软顶。 第二个软顶连接到汽车上。 第二软顶通过将顶篷锚固件与固定到第二软顶的容器接合而直接连接到顶篷。