SEMICONDUCTOR DEVICE WITH JUNCTION FIELD-EFFECT TRANSISTOR AND MANUFACTURING METHOD OF THE SAME
    43.
    发明申请
    SEMICONDUCTOR DEVICE WITH JUNCTION FIELD-EFFECT TRANSISTOR AND MANUFACTURING METHOD OF THE SAME 有权
    具有连接场效应晶体管的半导体器件及其制造方法

    公开(公告)号:US20120080728A1

    公开(公告)日:2012-04-05

    申请号:US13248173

    申请日:2011-09-29

    Abstract: A semiconductor device with a JFET is disclosed. The semiconductor device includes a trench and a contact embedded layer formed in the trench. A gate wire is connected to the contact embedded layer, so that the gate wire is connected to an embedded gate layer via the contact embedded layer. In this configuration, it is possible to downsize a contact structure between the embedded gate layer and the gate wire.

    Abstract translation: 公开了一种具有JFET的半导体器件。 半导体器件包括形成在沟槽中的沟槽和接触嵌入层。 栅极线连接到触点嵌入层,使得栅极线经由接触嵌入层连接到嵌入式栅极层。 在这种结构中,可以减小嵌入式栅极层与栅极线之间的接触结构。

    Cross-platform architecture for replicating profiling scheme in a computer system
    46.
    发明授权
    Cross-platform architecture for replicating profiling scheme in a computer system 有权
    用于在计算机系统中复制分析方案的跨平台架构

    公开(公告)号:US08141066B2

    公开(公告)日:2012-03-20

    申请号:US12000645

    申请日:2007-12-14

    CPC classification number: G06F8/443 G06F11/3466 G06F11/3476

    Abstract: The method, an apparatus, and/or a system of cross-platform architecture for replicating profiling scheme in a computer system are disclosed. In one embodiment, a method for forming profiling information of one computer platform in another computer platform includes generating instrumented code by a code instrumenter using a target platform code. The method further includes generating the profile information that the source platform profiling tools can decipher and utilize using the instrumented code, and generating a profile report by analyzing the generated profile information using the source platform profiling tools in a dynamic binary translator that can be used by the dynamic binary translator (DBT) to generate target platform code. In addition, the method may include translating source platform object code into the target platform code using the DBT.

    Abstract translation: 公开了用于在计算机系统中复制分析方案的方法,装置和/或跨平台体系结构系统。 在一个实施例中,用于在另一个计算机平台中形成一个计算机平台的分析信息的方法包括使用目标平台代码由代码工具生成装配的代码。 该方法还包括生成源平台分析工具可以使用所检测的代码来解密和利用的简档信息,以及通过使用动态二进制翻译器中的源平台分析工具分析生成的简档信息来生成简档报告 动态二进制翻译器(DBT)来生成目标平台代码。 另外,该方法可以包括使用DBT将源平台对象代码转换成目标平台代码。

    Power switches having positive-channel high dielectric constant insulated gate field effect transistors
    47.
    发明授权
    Power switches having positive-channel high dielectric constant insulated gate field effect transistors 有权
    具有正通道高介电常数绝缘栅场效应晶体管的电源开关

    公开(公告)号:US07999607B2

    公开(公告)日:2011-08-16

    申请号:US12775209

    申请日:2010-05-06

    CPC classification number: H01L27/088

    Abstract: Power switch units for microelectronic devices are disclosed. In one aspect, a microelectronic device may include a functional circuit, and a power switch unit to switch power to the functional circuit on and off. The power switch unit may include a large number of transistors coupled together. The transistors may include predominantly positive-channel, insulated gate field effect transistors, which have a gate dielectric that includes a high dielectric constant material. Power switch units having such transistors may tend to have low power consumption. In an aspect, an overdrive voltage may be applied to the gates of such transistors to further reduce power consumption. Methods of overdriving such transistors and systems including such power switch units are also disclosed.

    Abstract translation: 公开了用于微电子器件的功率开关单元。 一方面,微电子器件可以包括功能电路,以及电源开关单元,用于将功率电路接通和断开。 电源开关单元可以包括耦合在一起的大量晶体管。 晶体管可以包括主要为正沟道绝缘栅场效应晶体管,其具有包括高介电常数材料的栅极电介质。 具有这种晶体管的功率开关单元倾向于具有低功耗。 在一方面,可以将过驱动电压施加到这种晶体管的栅极,以进一步降低功耗。 还公开了过载驱动这种晶体管和包括这种功率开关单元的系统的方法。

    Method and system of executing a software application in highly constrained memory situation
    50.
    发明授权
    Method and system of executing a software application in highly constrained memory situation 有权
    在高度受限的内存情况下执行软件应用程序的方法和系统

    公开(公告)号:US07895427B2

    公开(公告)日:2011-02-22

    申请号:US11846527

    申请日:2007-08-29

    CPC classification number: G06F9/44505

    Abstract: A method and system for executing a software application having a binary size that is larger than an available memory space in an embedded system from which the software application will execute. The software application is split into one or more initialization sequences and a main code sequence. The method includes loading (302) each initialization sequence of the one or more initialization sequences in the memory space prior to its execution, and executing (304) each initialization sequence of the one or more initialization sequences out of the memory space. Further, the method includes loading (306) the main code sequence in the memory space after the execution of the one or more initialization codes and then executing (308) the main code sequence out of the memory space.

    Abstract translation: 一种用于执行软件应用程序的方法和系统,所述软件应用程序具有大于所述软件应用将从其执行的嵌入式系统中的可用存储器空间的二进制大小。 软件应用程序分为一个或多个初始化序列和主要代码序列。 该方法包括在其执行之前将(存储器)空间中的一个或多个初始化序列的每个初始化序列加载(302),并且从存储器空间中执行(304)一个或多个初始化序列的每个初始化序列。 此外,该方法包括在执行一个或多个初始化代码之后将主代码序列加载(306)到存储器空间中,然后从存储器空间执行(308)主代码序列。

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