Abstract:
A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through the tunnel insulation layer. The select gate electrode is insulated from the control gate electrode. According to the non-volatile memory device, a select gate electrode and a control gate electrode are formed on a floating gate, and thus a voltage is applied to the respective gate electrodes to write and erase data.
Abstract:
Provided are a method and apparatus for encoding and decoding a stereoscopic image format. The method includes generating a combined image by combining a base view image and an additional view image, generating a depth map between the base view image and the additional view image, generating a first YUV format using the combined image, and generating a second YUV format using the depth map.
Abstract:
The present invention discloses a data processing method for application layer based on a living network control protocol. The data processing method for application layer which is based on a predetermined protocol composed of at least a lower layer and an application layer includes the steps of: receiving a predetermined primitive from an upper application software; generating a communication cycle identifier (CycleID) according to the primitive; generating a service description according to the primitive and the communication cycle identifier (CycleID); composing an application layer protocol data unit (APDU) including the primitive; and transmitting the APDU to the lower layer.
Abstract:
The present invention discloses a home network system using a living network control protocol. The home network system includes: a network based on a predetermined protocol; at least one electric device connected to the network; and a network manager connected to the network, for controlling and/or monitoring the electric device, wherein the protocol includes an application layer, a network layer, a data link layer and a physical layer, wherein the physical layer further includes a special protocol for providing an interface with a dependent transmission medium, and the network layer further includes a home code control sub-layer for managing a home code form network security when accessing the dependent transmission medium; and wherein an application layer protocol data unit (APDU) is transmitted between the application layer and the network layer, a network layer protocol data unit (NPDU) is transmitted between the network layer and the data link layer and the between the network layer and the home code control sub-layer, a home code control sub-layer protocol data unit (HCNPDU) is transmitted between the home code control sub-layer and the data link layer, and a data frame unit is transmitted between the data link layer and the physical layer.
Abstract:
A robot cleaner that cleans a cleaning region while traveling the cleaning region and a method to control the same are provided. The robot cleaner can uniformly clean a cleaning region based on a wall-following technique which allows the robot cleaner to travel along the outline of the cleaning region. The method selects, as a reference wall, a wall at a left or right side of the robot cleaner at a start position of the robot cleaner based on a left or right-based travel algorithm, which allows the robot cleaner to travel along a left or right wall, and controls the robot cleaner to travel the cleaning region in a zigzag travel pattern in which the robot cleaner moves a predetermined distance in a direction perpendicular to the reference wall at specific intervals along the selected reference wall while following the selected reference wall.
Abstract:
In a split gate type nonvolatile memory device, a supplementary layer pattern is disposed on a source region of a semiconductor substrate. Since the source region is vertically extended by virtue of the presence of the supplementary layer pattern, it is therefore possible to increase an area of a region where a floating gate overlaps the source region and the supplementary layer pattern. Accordingly, the capacitance of a capacitor formed between the source and the floating gate increases so that it is possible for the nonvolatile memory device to perform program/erase operations at a low voltage level.
Abstract:
The present invention relates to a high voltage transistor and method of manufacturing the same. The high voltage transistor includes: a channel region which is formed in a semiconductor substrate; a gate insulating film which is formed on the channel region of the semiconductor substrate; a low concentration source region and a low concentration drain region having the channel region interposed therebetween and each being formed in the semiconductor substrate; a high concentration source region which is formed to be spaced away from the channel region by a first distance; a high concentration drain region which is formed to be spaced away from the channel region by a second distance that is larger than the first distance; a gate electrode which has a gate bottom portion interfacing with the gate insulating film over the channel region, and a gate top portion integrated with the gate bottom portion and protruding by a predetermined length from a top of the gate bottom portion to extend over the low concentration drain region; a first metal silicide layer which is formed on the high concentration source region; and a second metal silicide layer which is formed on the high concentration drain region.
Abstract:
The present invention discloses a home network system using an LnCP. The home network system includes one or more master devices, one or more slave devices, and a network for connecting the master devices to the slave devices on the basis of a predetermined protocol. In the home network system, the master device performs one or plural communication cycles with the plurality of slave devices at the same time at a predetermined time point, and each slave device performs one communication cycle with the master device at the time point.
Abstract:
A semiconductor memory device having a self-aligned charge trapping layer and a method of manufacturing the same in which a consistent length of an ONO layer is ensured. Here, an insulating stacked structure is self-aligned to a bottom surface of conductive spacers.
Abstract:
There is provided a turntable and an optical disc driver. The turntable includes an assembly groove into which a clamp plate is inserted and at least one fixing jaws formed in the assembly groove to be fastened to the clamp plate. The optical disc driver includes a clamp plate including at least one fastening holes formed on the circumference thereof and fixing protrusions formed in the fastening holes and a turntable including an assembly groove into which the clamp plate is inserted and at least one fixing jaws formed in the assembly groove to be fastened to the fixing protrusions of the clamp plate.