公开(公告)号：US20200373310A1

公开(公告)日：2020-11-26

申请号：US16517956

申请日：2019-07-22

Applicant: APPLIED MATERIALS, INC.

Inventor： Takehito Koshizawa ,  Mukund Srinivasan ,  Tomohiko Kitajima ,  Chang Seok Kang ,  Sung-Kwan Kang ,  Gill Y. Lee ,  Susmit Singha Roy

IPC: H01L27/1157 ,  H01L27/11582

Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.

公开(公告)号：US10790287B2

公开(公告)日：2020-09-29

申请号：US16204300

申请日：2018-11-29

Applicant: Applied Materials, Inc.

Inventor： Sung-Kwan Kang ,  Gill Yong Lee ,  Sang Ho Yu ,  Shih Chung Chen ,  Jeffrey W. Anthis

IPC: H01L27/108 ,  H01L29/49 ,  H01L29/423 ,  H01L21/28 ,  H01L21/321 ,  H01L21/02 ,  H01L21/3213

Abstract: Memory devices and methods of forming memory devices are described. The memory devices comprise two work-function metal layers, where one work-function layer has a lower work-function than the other work-function layer. The low work-function layer may reduce gate-induced drain leakage current losses. Methods of forming memory devices are also described.

公开(公告)号：US20200176451A1

公开(公告)日：2020-06-04

申请号：US16204300

申请日：2018-11-29

Applicant: Applied Materials, Inc.

Inventor： Sung-Kwan Kang ,  Gill Yong Lee ,  Sang Ho Yu ,  Shih Chung Chen ,  Jeffrey W. Anthis

IPC: H01L27/108 ,  H01L29/49 ,  H01L21/3213 ,  H01L29/423 ,  H01L21/28

Abstract: Memory devices and methods of forming memory devices are described. The memory devices comprise two work-function metal layers, where one work-function layer has a lower work-function than the other work-function layer. The low work-function layer may reduce gate-induced drain leakage current losses. Methods of forming memory devices are also described.

公开(公告)号：US10529602B1

公开(公告)日：2020-01-07

申请号：US16189487

申请日：2018-11-13

Applicant: APPLIED MATERIALS, INC.

Inventor： Priyadarshi Panda ,  Gill Lee ,  Srinivas Gandikota ,  Sung-Kwan Kang ,  Sanjay Natarajan

IPC: H01L21/67

Abstract: Methods and apparatuses for substrate fabrication are provided herein. The apparatus, for example, can include a cluster tool including a vacuum transfer module (VTM) configured to receive, under vacuum conditions, a silicon substrate with a polysilicon plug (poly plug) and transfer, without vacuum break, the substrate to and from a plurality of processing chambers each independently connected to the VTM for performing a corresponding one of a plurality of DRAM bit line processes on the substrate, the plurality of processing chambers comprising a pre-cleaning chamber configured to remove native oxide from a surface of the substrate, a barrier metal deposition chamber configured to deposit the barrier metal on the surface of the poly plug on the silicon substrate, a barrier layer deposition chamber configured to deposit at least one material on the surface of the barrier metal, a bit line metal deposition chamber configured to deposit at least one material on the surface of the barrier layer, and a hard mask deposition chamber configured to deposit at least one material on the surface of the bit line metal.