公开(公告)号：US20240315025A1

公开(公告)日：2024-09-19

申请号：US18599613

申请日：2024-03-08

Applicant: Applied Materials, Inc.

Inventor： Chang Seok Kang

IPC: H10B43/27

CPC classification number: H10B43/27

Abstract: Described is a memory string including at least one select gate for drain (SGD) transistor and at least one memory transistor in a vertical hole extending through a memory stack on a substrate. The memory stack comprises alternating word lines and dielectric material. There is at least one select-gate-for-drain (SGD) transistor in a first vertical hole extending through the memory stack, the select-gate-for-drain (SGD) transistor comprising a first gate material. At least one memory transistor is in a second vertical hole extending through the memory stack, the at least one memory transistor comprising a second gate material different from the first gate material.

公开(公告)号：US11587796B2

公开(公告)日：2023-02-21

申请号：US17147578

申请日：2021-01-13

Applicant: Applied Materials, Inc.

Inventor： Chang Seok Kang ,  Tomohiko Kitajima ,  Sung-Kwan Kang

IPC: H01L21/321 ,  H01L27/11582 ,  H01L21/768 ,  H01L23/522

Abstract: Memory devices and methods of manufacturing memory devices are provided. The device and methods described suppress oxidation of metal layers exposed to ambient oxygen. After an opening is formed, a nitridation process occurs to nitridate the surface of the exposed metal layer inside the opening. The nitridated region formed on the surface of metal layer inside the opening works as a barrier layer for oxygen diffusion. In addition, the nitridated region works as an electrode for charge trap memory cells.

公开(公告)号：US20220319601A1

公开(公告)日：2022-10-06

申请号：US17705744

申请日：2022-03-28

Applicant: Applied Materials, Inc.

Inventor： Chang Seok Kang ,  Tomohiko Kitajima ,  Gill Yong Lee ,  Qian Fu ,  Sung-Kwan Kang ,  Takehito Koshizawa ,  Fredrick Fishburn

IPC: G11C16/04 ,  H01L27/11582 ,  H01L27/11556 ,  H01L27/11524 ,  H01L27/1157

Abstract: Described is a memory string including at least one select gate for drain (SGD) transistor and at least one memory transistor in a vertical hole extending through a memory stack on a substrate. The memory stack comprises alternating word lines and dielectric material. There is at least one select-gate-for-drain (SGD) transistor in a first vertical hole extending through the memory stack, the select-gate-for-drain (SGD) transistor comprising a first gate material. At least one memory transistor is in a second vertical hole extending through the memory stack, the at least one memory transistor comprising a second gate material different from the first gate material.

公开(公告)号：US11295786B2

公开(公告)日：2022-04-05

申请号：US16779830

申请日：2020-02-03

Applicant: Applied Materials, Inc.

Inventor： Chang Seok Kang ,  Tomohiko Kitajima ,  Gill Yong Lee ,  Sanjay Natarajan ,  Sung-Kwan Kang ,  Lequn Liu

IPC: H01L27/108 ,  H01L21/8242 ,  G11C5/06

Abstract: Memory devices are described. The memory devices include a plurality of bit lines extending through a stack of alternating memory layers and dielectric layers. Each of the memory layers comprises a single crystalline-like silicon layer and includes a first word line, a second word line, a first capacitor, and a second capacitor. Methods of forming stacked memory devices are also described.

公开(公告)号：US20210272604A1

公开(公告)日：2021-09-02

申请号：US17323165

申请日：2021-05-18

Applicant: Applied Materials, Inc.

Inventor： Sung-Kwan Kang ,  Gill Yong Lee ,  Chang Seok Kang

IPC: G11C5/06 ,  H01L27/108

Abstract: Memory devices are described. The memory devices include a plurality of bit lines extending through a stack of alternating memory layers and dielectric layers. Each of the memory layers include a first word line, a second word line, a first capacitor, and a second capacitor. Methods of forming stacked memory devices are also described.

公开(公告)号：US20210257375A1

公开(公告)日：2021-08-19

申请号：US17228034

申请日：2021-04-12

Applicant: APPLIED MATERIALS, INC.

Inventor： Takehito Koshizawa ,  Mukund Srinivasan ,  Tomohiko Kitajima ,  Chang Seok Kang ,  Sung-Kwan Kang ,  Gill Y. Lee ,  Susmit Singha Roy

IPC: H01L27/1157 ,  H01L27/11582

Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.

公开(公告)号：US20210233918A1

公开(公告)日：2021-07-29

申请号：US17227925

申请日：2021-04-12

Applicant: APPLIED MATERIALS, INC.

Inventor： Takehito Koshizawa ,  Mukund Srinivasan ,  Tomohiko Kitajima ,  Chang Seok Kang ,  Sung-Kwan Kang ,  Gill Y. Lee ,  Susmit Singha Roy

IPC: H01L27/1157 ,  H01L27/11582

Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.

公开(公告)号：US20200373310A1

公开(公告)日：2020-11-26

申请号：US16517956

申请日：2019-07-22

Applicant: APPLIED MATERIALS, INC.

Inventor： Takehito Koshizawa ,  Mukund Srinivasan ,  Tomohiko Kitajima ,  Chang Seok Kang ,  Sung-Kwan Kang ,  Gill Y. Lee ,  Susmit Singha Roy

IPC: H01L27/1157 ,  H01L27/11582

Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.

公开(公告)号：US20250022935A1

公开(公告)日：2025-01-16

申请号：US18761490

申请日：2024-07-02

Applicant: Applied Materials, Inc.

Inventor： Chang Seok Kang ,  Raghuveer Satya Makala ,  Naomi Yoshida ,  Hsueh Chung Chen ,  Balasubramanian Pranatharthiharan

IPC: H01L29/49 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35

Abstract: Methods of manufacturing memory devices are provided. The method comprises forming a first epitaxial layer on a substrate; and forming a memory array on the first epitaxial layer, the memory array comprising a memory stack of alternating layers of an oxide material and a metal material on the first epitaxial layer, at least one memory cell extending from the first epitaxial layer through the memory stack, and a slit filled with a fill material adjacent to the at least one memory cell.

公开(公告)号：US20230369031A1

公开(公告)日：2023-11-16

申请号：US18127213

申请日：2023-03-28

Applicant: Applied Materials, Inc.

Inventor： Tomohiko Kitajima ,  Ning Li ,  Chang Seok Kang ,  Naomi Yoshida

IPC: H01J37/32 ,  H01L21/02 ,  H01L21/67 ,  C23C16/02 ,  C23C16/56 ,  C23C16/34 ,  C23C16/36 ,  C23C16/38

CPC classification number: H01J37/32899 ,  H01L21/0217 ,  H01L21/0234 ,  H01L21/67167 ,  C23C16/0227 ,  C23C16/56 ,  C23C16/345 ,  C23C16/36 ,  C23C16/38 ,  C23C16/342 ,  H01J2237/335 ,  H01J2237/332 ,  H01J2237/336 ,  H01J37/32816 ,  H01J2237/20278

Abstract: Methods of manufacturing memory devices are provided. The method comprises pre-cleaning a top surface of a film stack, the film stack comprising alternating layers of a first material layer and a second material layer and having one or more of a memory hole and a slit pattern opening extending through the film stack; exposing the top surface of the film stack to a growth inhibitor; selectively depositing a silicon-containing dielectric layer in a region of the film stack; and densifying the silicon-containing dielectric layer. The processing method is performed in a processing tool without breaking vacuum.