公开(公告)号：US20210327715A1

公开(公告)日：2021-10-21

申请号：US17227621

申请日：2021-04-12

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Eric James Shero ,  Charles Dezelah ,  Giuseppe Alessio Verni ,  Petri Raisanen

IPC: H01L21/28 ,  H01L29/49 ,  C23C16/34 ,  C23C16/455 ,  C23C16/52

Abstract: Methods and systems for depositing chromium nitride layers onto a surface of the substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a deposition process, depositing a chromium nitride layer onto a surface of the substrate. The deposition process can include providing a chromium precursor to the reaction chamber and separately providing a nitrogen reactant to the reaction chamber. The deposition process may be a thermal cyclical deposition process.

公开(公告)号：US11101370B2

公开(公告)日：2021-08-24

申请号：US16453249

申请日：2019-06-26

Applicant: ASM IP Holding B.V.

Inventor： Fu Tang ,  Qi Xie ,  Jan Willem Maes ,  Xiaoqiang Jiang ,  Michael Eugene Givens

IPC: H01L21/02 ,  H01L21/28 ,  H01L29/66

Abstract: A method for forming layers suitable for a V-NAND stack is disclosed. Specifically, the method may include multiple cycles for forming an oxide and a nitride in order to form an oxynitride layer.

公开(公告)号：US20210242011A1

公开(公告)日：2021-08-05

申请号：US17162279

申请日：2021-01-29

Applicant: ASM IP Holding B.V.

Inventor： Eric James Shero ,  Michael Eugene Givens ,  Qi Xie ,  Charles Dezelah ,  Giuseppe Alessio Verni

IPC: H01L21/02 ,  H01L29/423 ,  H01L27/092 ,  H01L29/06 ,  H01L29/66

Abstract: Methods and systems for depositing vanadium and/or indium layers onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a vanadium and/or indium layer onto the surface of the substrate. The cyclical deposition process can include providing a vanadium and/or indium precursor to the reaction chamber and separately providing a reactant to the reaction chamber. The cyclical deposition process may desirably be a thermal cyclical deposition process. Exemplary structures can include field effect transistor structures, such as gate all around structures. The vanadium and/or indium layers can be used, for example, as barrier layers or liners, as work function layers, as dipole shifter layers, or the like.

公开(公告)号：US20210180184A1

公开(公告)日：2021-06-17

申请号：US17113242

申请日：2020-12-07

Applicant: ASM IP Holding B.V.

Inventor： Giuseppe Alessio Verni ,  Qi Xie ,  Henri Jussila ,  Charles Dezelah ,  Jiyeon Kim ,  Eric James Shero ,  Paul Ma

IPC: C23C16/34 ,  C23C16/455 ,  C23C16/52 ,  H01L29/43

Abstract: Methods and systems for depositing vanadium nitride layers onto a surface of the substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a vanadium nitride layer onto a surface of the substrate. The cyclical deposition process can include providing a vanadium halide precursor to the reaction chamber and separately providing a nitrogen reactant to the reaction chamber. The cyclical deposition process may desirably be a thermal cyclical deposition process.

公开(公告)号：US20210134959A1

公开(公告)日：2021-05-06

申请号：US17084354

申请日：2020-10-29

Applicant: ASM IP Holding B.V.

Inventor： Lucas Petersen Barbosa Lima ,  Rami Khazaka ,  Qi Xie

IPC: H01L29/167 ,  H01L21/02 ,  H01L21/67

Abstract: Methods and systems for depositing material, such as doped semiconductor material, are disclosed. An exemplary method includes providing a substrate, forming a first doped semiconductor layer overlying the substrate, and forming a second doped semiconductor layer overlying the first doped semiconductor layer, wherein the first doped semiconductor layer comprises a first dopant and a second dopant, and wherein the second doped semiconductor layer comprises the first dopant. Structures and devices formed using the methods and systems for performing the methods are also disclosed.

公开(公告)号：US20210066079A1

公开(公告)日：2021-03-04

申请号：US16998220

申请日：2020-08-20

Applicant: ASM IP Holding B.V.

Inventor： Lucas Petersen Barbosa Lima ,  Rami Khazaka ,  Qi Xie

IPC: H01L21/02 ,  H01L21/311 ,  H01L29/167

Abstract: Methods and systems for selectively depositing a p-type doped silicon germanium layer and structures and devices including a p-type doped silicon germanium layer are disclosed. An exemplary method includes providing a substrate, comprising a surface comprising a first area comprising a first material and a second area comprising a second material, within a reaction chamber; depositing a p-type doped silicon germanium layer overlying the surface, the p-type doped silicon germanium layer comprising gallium; and depositing a cap layer overlying the p-type doped silicon germanium layer. The method can further include an etch step to remove the cap layer and the p-type doped silicon germanium layer overlying the second material.

公开(公告)号：US10793946B1

公开(公告)日：2020-10-06

申请号：US16676017

申请日：2019-11-06

Applicant: ASM IP Holding B.V.

Inventor： Delphine Longrie ,  Antti Juhani Niskanen ,  Han Wang ,  Qi Xie ,  Jan Willem Maes ,  Shang Chen ,  Toshiharu Watarai ,  Takahiro Onuma ,  Dai Ishikawa ,  Kunitoshi Namba

IPC: C23C16/02 ,  C23C16/06 ,  C23C16/34 ,  C23C16/44 ,  C23C16/455 ,  H01L21/768 ,  H01L21/285 ,  C23C16/56

Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.

公开(公告)号：US20200227325A1

公开(公告)日：2020-07-16

申请号：US16834657

申请日：2020-03-30

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Chiyu Zhu ,  Kiran Shrestha ,  Pauline Calka ,  Oreste Madia ,  Jan Willem Maes ,  Michael Eugene Givens

IPC: H01L21/8238 ,  H01L29/49 ,  H01L29/51 ,  H01L27/092

Abstract: A method for forming a semiconductor device structure is disclosure. The method may include, depositing an NMOS gate dielectric and a PMOS gate dielectric over a semiconductor substrate, depositing a first work function metal over the NMOS gate dielectric and over the PMOS gate dielectric, removing the first work function metal over the PMOS gate dielectric, and depositing a second work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. Semiconductor device structures including desired metal gate electrodes deposited by the methods of the disclosure are also disclosed.

公开(公告)号：US20190067003A1

公开(公告)日：2019-02-28

申请号：US16105745

申请日：2018-08-20

Applicant: ASM IP Holding B.V.

Inventor： Bhushan Zope ,  Shankar Swaminathan ,  Kiran Shrestha ,  Chiyu Zhu ,  Henri Tuomas Antero Jussila ,  Qi Xie

IPC: H01L21/02 ,  H01L21/768

Abstract: Methods for depositing a molybdenum metal film directly on a dielectric material surface of a substrate by a cyclical deposition process are disclosed. The methods may include: providing a substrate comprising a dielectric surface into a reaction chamber; and depositing a molybdenum metal film directly on the dielectric surface, wherein depositing comprises: contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor; and contacting the substrate with a second vapor phase reactant comprising a reducing agent precursor. Semiconductor device structures including a molybdenum metal film disposed directly on a surface of a dielectric material deposited by the methods of the disclosure are also disclosed.

公开(公告)号：US20180308686A1

公开(公告)日：2018-10-25

申请号：US16018692

申请日：2018-06-26

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  David de Roest ,  Jacob Woodruff ,  Michael Eugene Givens ,  Jan Willem Maes ,  Timothee Blanquart

IPC: H01L21/02 ,  H01L29/417 ,  H01L29/36 ,  H01L21/265

Abstract: A method for improving source/drain performance through conformal solid state doping and its resulting device are disclosed. Specifically, the doping takes place through an atomic layer deposition of a dopant layer. Embodiments of the invention may allow for an increased doping layer, improved conformality, and reduced defect formation, in comparison to alternate doping methods, such as ion implantation or epitaxial doping.