公开(公告)号：US09905900B2

公开(公告)日：2018-02-27

申请号：US14702044

申请日：2015-05-01

申请人： Quentin P. Herr ,  Aaron A. Pesetski ,  Pavel Borodulin

发明人： Quentin P. Herr ,  Aaron A. Pesetski ,  Pavel Borodulin

IPC分类号： H03K19/195 ,  H01P3/06 ,  H03K3/38

CPC分类号： H01P3/06 ,  H03K3/38 ,  H03K19/195

摘要： A microwave circuit is provided that comprises a plurality of transmission lines each configured to receive and propagate a respective waveform signal of a plurality of waveform signals, and a combiner that receives and combines the plurality of waveform signals from outputs of the plurality of transmission lines into a combined output waveform signal that is output terminated by an output termination resistor. The microwave circuit further comprises a compensation signal generator that generates a compensation signal to mitigate reflections associated with the transmission of signals through the microwave circuit.

公开(公告)号：US20160079968A1

公开(公告)日：2016-03-17

申请号：US14485129

申请日：2014-09-12

申请人： JOEL D. STRAND ,  Aaron A. Pesetski

发明人： JOEL D. STRAND ,  Aaron A. Pesetski

IPC分类号： H03K3/38 ,  H03K3/012 ,  H01L39/24

CPC分类号： H03K3/38 ,  B82Y10/00 ,  G06N99/002 ,  H01L39/2493 ,  H03K3/012

摘要： Systems and methods are provided for a tunable transmon qubit. The qubit includes a first Josephson junction on a first path between a transmission line and a circuit ground and second and third Josephson junctions arranged in parallel with one another on a second path between the transmission line and the circuit ground to form a direct current superconducting quantum interference device (DC SQUID). The DC SQUID is in parallel with the first Josephson junction. A capacitor is arranged in parallel with the first Josephson junction and the DC SQUID on a third path between the transmission line and the circuit ground as to form, in combination with the first path, an outer loop of the tunable transmon qubit. A bias circuit is configured to provide a constant bias flux to one of the DC SQUID and the outer loop of the tunable transmon qubit.

摘要翻译： 为可调谐的超音速量子位提供了系统和方法。 量子比特包括在传输线和电路地之间的第一路径上的第一约瑟夫逊结，以及在传输线和电路接地之间的第二路径上彼此并联布置的第二和第三约瑟夫逊结，以形成直流超导量子 干扰设备（DC SQUID）。 DC SQUID与第一个约瑟夫逊结并联。 在传输线和电路接地之间的第三路径上，与第一约瑟夫逊结和DC SQUID并联地布置电容器，以便与第一路径组合形成可调谐的超音速量子位的外部环路。 偏置电路被配置为向可调谐跨量子位的DC SQUID和外部环路之一提供恒定的偏置通量。

公开(公告)号：US20130015885A1

公开(公告)日：2013-01-17

申请号：US13180034

申请日：2011-07-11

申请人： OFER NAAMAN ,  Jae I. Park ,  Aaron A. Pesetski

发明人： OFER NAAMAN ,  Jae I. Park ,  Aaron A. Pesetski

IPC分类号： H03K5/00 ,  H03H11/26

CPC分类号： B82Y10/00 ,  H03K3/38

摘要： Systems and methods are provided for reading an associated state of a qubit. A first soliton is injected along a first Josephson transmission line coupled to the qubit. A velocity of the first soliton is selected according to a physical length of the qubit and a characteristic frequency of the qubit. A second soliton is injected at the selected velocity along a second Josephson transmission line that is not coupled to the qubit. A delay associated with the first soliton is determined relative to the second soliton.

摘要翻译： 提供了用于读取量子位的相关状态的系统和方法。 沿耦合到量子位的第一个约瑟夫逊传输线注入第一个孤子。 根据量子位的物理长度和量子位的特征频率选择第一个孤子的速度。 沿着未耦合到量子位的第二个约瑟夫逊传输线以选定的速度注入第二个孤子。 相对于第二孤子确定与第一孤子相关联的延迟。

公开(公告)号：US07982646B2

公开(公告)日：2011-07-19

申请号：US12184204

申请日：2008-07-31

申请人： Quentin P. Herr ,  Aaron A. Pesetski ,  John X. Przybysz ,  Donald L. Miller

发明人： Quentin P. Herr ,  Aaron A. Pesetski ,  John X. Przybysz ,  Donald L. Miller

IPC分类号： H03M3/00

CPC分类号： H03M3/454 ,  H03M3/422 ,  H03M3/47

摘要： A second order superconductor delta-sigma analog-to-digital modulator having an input for receiving an analog signal, a first integrator coupled to the input, a second integrator cascaded with the first integrator, and a quantum comparator digitizing output from the second integrator reduces quantization noise by providing matched quantum accurate DACs in a feedback loop between output from the quantum comparator and input to the first integrator. The matched quantum accurate feedback DACs produce identically repeatable voltage pulses, may be configured for multi-bit output, may be time-interleaved to permit higher clocking rates, and may be employed in a balanced bipolar configuration to allow inductive input coupling. Bipolar feedback is balanced when gain of a first DAC exceeds gain of a matched, opposite polarity DAC by the amount of implicit feedback from the comparator into the second integrator.

摘要翻译： 具有用于接收模拟信号的输入端的第二级超导体Δ-Σ模数转换器，耦合到输入端的第一积分器，与第一积分器级联的第二积分器和来自第二积分器的量子比较器数字化输出减小 通过在量子比较器的输出和第一积分器的输出之间的反馈回路中提供匹配的量子精确DAC来进行量化噪声。 匹配的量子精确反馈DAC产生相同可重复的电压脉冲，可以被配置用于多位输出，可以被时间交织以允许更高的时钟速率，并且可以采用平衡双极配置来允许电感输入耦合。 当第一个DAC的增益超过匹配的相反极性DAC的增益时，双极反馈被平衡，这是由比较器到第二个积分器的隐含反馈量。