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公开(公告)号：US20240130250A1
公开(公告)日：2024-04-18
申请号：US17967584
申请日：2022-10-17
CPC分类号： H01L39/025 , H01L39/12 , H01L39/223 , H01L39/2493
摘要： A Josephson junction (JJ) device is disclosed that includes a first superconductor structure having a bottom superconductor arm portion and a second superconductor structure having a top superconductor arm portion disposed substantially orthogonal to the bottom superconductor arm portion and overlapping the bottom superconductor arm portion in a JJ operation region. The JJ device further includes a dielectric material layer acting as a tunnel barrier disposed between the bottom superconductor arm portion and the top superconductor arm portion in the JJ operation region to form an operating JJ.
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公开(公告)号：US20240065115A1
公开(公告)日：2024-02-22
申请号：US17890215
申请日：2022-08-17
申请人： Huang Family Corp.
发明人： Kevin Huang , Gianpaolo Carosi , Yaniv J. Rosen , Nathan Woollett
CPC分类号： H01L39/223 , H01L39/025 , H01L39/2493
摘要： An apparatus includes a first superconductor layer, an insulating layer, and a second superconductor layer, wherein the second superconductor layer is a spin triplet superconductor (STS) layer. In some embodiments, the first superconductor layer is also a STS layer. In some embodiments, the second superconductor layer includes UCoGe. In some embodiments, the insulating layer includes uranium oxide. In some embodiments, the uranium oxide is created by exposing the second superconductor layer to an oxidizing gas, with or without heating. In some embodiments, the first superconductor layer, the insulating layer and the second superconductor layer form a Josephson junction.
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公开(公告)号：US20230337552A1
公开(公告)日：2023-10-19
申请号：US17722292
申请日：2022-04-15
CPC分类号： H01L39/045 , H01L24/16 , H01L24/14 , H01L39/2493 , H03F19/00 , H05K1/181 , H01L2224/16225 , H01L2224/14177
摘要： A superconducting electrical device includes one or more traveling-wave parametric amplifiers (TWPAs) on a chip that is electrically connected to a wiring layer of a substrate. The electrical connection of the chip to the wiring layer of the substrate includes, for each of the one or more TWPAs, a signal bump-bond between the TWPA and the substrate. There is a peripheral ring of ground bumps around the signal bump between the TWPA and the substrate.
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公开(公告)号：US11727296B2
公开(公告)日：2023-08-15
申请号：US16379651
申请日：2019-04-09
发明人： Sergey Pereverzev
IPC分类号： C30B29/00 , G06N10/00 , H01L39/24 , G01R33/02 , C01B19/02 , C01B13/00 , C22C27/04 , C22C5/04 , H01L39/12 , H01L39/22 , C01B32/00 , C30B1/00 , C30B7/00 , C30B33/08 , C30B33/04
CPC分类号： G06N10/00 , C01B13/00 , C01B19/02 , C01B32/00 , C22C5/04 , C22C27/04 , C30B1/00 , C30B7/00 , C30B7/005 , C30B29/00 , C30B33/04 , C30B33/08 , G01R33/02 , H01L39/12 , H01L39/223 , H01L39/2493 , C01P2006/40
摘要： Materials, products, methods of use and fabrication thereof are disclosed. The materials are particularly well suited for application in products such as superconducting devices and quantum computing, due to ability to avoid undesirable effects from inherent noise and decoherence. The materials are formed from select isotopes having zero nuclear spin into a single crystal-phase film or layer of thickness depending on the desired application of the resulting device. The film/layer may be suspended or disposed on a substrate. The isotopes may be enriched from naturally-occurring sources of isotopically mixed elemental material(s). The single crystal is preferably essentially devoid of structural defects such as grain boundaries, inclusions, impurities and lattice vacancies.
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公开(公告)号：US20190042962A1
公开(公告)日：2019-02-07
申请号：US15669139
申请日：2017-08-04
IPC分类号： G06N99/00 , G11C11/44 , H03K19/195 , H01L27/18 , G11C16/02
CPC分类号： G06N10/00 , G11C11/44 , G11C16/02 , H01L27/18 , H01L39/025 , H01L39/045 , H01L39/22 , H01L39/223 , H01L39/2493 , H03K19/1952
摘要： A technique relates to a superconducting qubit. A Josephson junction includes a first superconductor and a second superconductor formed on a non-superconducting metal. A capacitor is coupled in parallel with the Josephson junction.
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6.发明申请公开(公告)号：US20180301613A1
公开(公告)日：2018-10-18
申请号：US15813902
申请日：2017-11-15
发明人： Baleegh ABDO
CPC分类号： H01L39/025 , B82Y40/00 , H01L39/2493 , H01P1/38 , H01P5/12 , H03D7/005
摘要： A technique relates to a superconducting device. A first mixing device has a first mixing port and a second mixing port. A second mixing device has another first mixing port and another second mixing port. The first and second mixing devices are superconducting nondegenerate three-wave mixing devices. The first mixing port and the another first mixing port are configured to couple to a first coupler. The second mixing port and the another second mixing port are configured to couple to a second coupler.
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公开(公告)号：US20180247974A1
公开(公告)日：2018-08-30
申请号：US15745914
申请日：2016-07-21
发明人： William D. Oliver , Rabindra N. Das , David J. Hover , Danna Rosenberg , Xhovalin Miloshi , Vladimir Bolkhovsky , Jonilyn L. Yoder , Corey W. Stull , Mark A. Gouker
CPC分类号： H01L27/18 , G06N10/00 , H01L39/045 , H01L39/223 , H01L39/2416 , H01L39/2493 , H01P7/086
摘要： A superconducting integrated circuit includes at least one superconducting resonator, including a substrate, a conductive layer disposed over a surface of the substrate with the conductive layer including at least one conductive material including a substantially low stress polycrystalline Titanium Nitride (TiN) material having an internal stress less than about two hundred fifty MPa (magnitude) such that the at least one superconducting resonator and/or qubit (hereafter called “device”) is provided as a substantially high quality factor, low loss superconducting device.
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公开(公告)号：US10056540B2
公开(公告)日：2018-08-21
申请号：US15653857
申请日：2017-07-19
IPC分类号： H01L39/02 , H01L39/10 , H03K3/38 , G06N99/00 , H01L39/04 , H01L39/24 , H01L39/22 , H01L41/09
CPC分类号： H01L39/10 , G06N10/00 , H01L39/025 , H01L39/045 , H01L39/223 , H01L39/2493 , H01L41/094 , H03K3/38
摘要： A system for adjusting qubit frequency includes a qubit device having a Josephson junction and a shunt capacitor coupled to electrodes of the Josephson junction. A cantilevered conductor is separated from the shunt capacitor by a spacing. An adjustment mechanism is configured to deflect the cantilevered conductor to tune a qubit frequency for the qubit device.
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9.发明申请公开(公告)号：US20180232655A1
公开(公告)日：2018-08-16
申请号：US15946744
申请日：2018-04-06
CPC分类号： G06N99/002 , H01L25/04 , H01L27/18 , H01L39/045 , H01L39/223 , H01L39/2493
摘要： A technique relates to an assembly for a quantum computing device. A quantum bus plane includes a first set of recesses. A readout plane includes a second set of recesses. A block is positioned to hold the readout plane opposite the quantum bus plane, such that the first set of recesses opposes the second set of recesses. A plurality of qubit chips are included where each has a first end positioned in the first set of recesses and has a second end positioned in the second set of recesses.
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公开(公告)号：US10003005B2
公开(公告)日：2018-06-19
申请号：US15244827
申请日：2016-08-23
CPC分类号： H01L39/2493 , H01L39/025 , H01L39/223
摘要： A method is provided of forming a superconductor device interconnect structure. The method includes forming a first high temperature dielectric layer overlying a substrate, forming a base electrode in the first high temperature dielectric layer with the base electrode having a top surface aligned with the top surface of the first high temperature dielectric layer, and depositing a second high temperature dielectric layer over the first high temperature dielectric layer and the base electrode. The method further comprises forming a first contact through the second dielectric layer to a first end of the base electrode, forming a Josephson junction (JJ) overlying and in contact with the first contact, and forming a second contact through the second dielectric layer to a second end of the base electrode.
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