公开(公告)号：US20110202690A1

公开(公告)日：2011-08-18

申请号：US12764583

申请日：2010-04-21

申请人： Chien-Hua Chu ,  Hong-Lipp Ko

发明人： Chien-Hua Chu ,  Hong-Lipp Ko

IPC分类号： G06F13/00 ,  G06F1/32 ,  G06F1/26 ,  G06F3/00 ,  G06F12/00

CPC分类号： G06F3/0601 ,  G06F1/3203 ,  G06F1/3275 ,  G06F13/1684 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D50/20

摘要： A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface.

公开(公告)号：US20110113184A1

公开(公告)日：2011-05-12

申请号：US12646406

申请日：2009-12-23

申请人： Chien-Hua Chu

发明人： Chien-Hua Chu

IPC分类号： G06F12/02

CPC分类号： G06F1/30 ,  G06F11/1441

摘要： A data backup method for backing up data temporarily stored in a cache memory of a flash memory storage device is provided, where the flash memory storage device has a plurality of physical units. The data backup method includes logically grouping a portion of the physical units into a data area and a cache area. The data backup method also includes determining whether a trigger signal is received; and when the trigger signal is received, copying the data temporarily stored in the cache memory into the cache area. Accordingly, the data backup method can quickly write the data temporarily stored in the cache memory into the physical units, thereby preventing a time out problem which may occur in the flash memory storage device.

摘要翻译： 提供一种用于备份临时存储在闪存存储设备的高速缓冲存储器中的数据的数据备份方法，其中闪速存储器存储设备具有多个物理单元。 数据备份方法包括将一部分物理单元逻辑地分组成数据区和缓存区。 数据备份方法还包括确定是否接收到触发信号; 并且当接收到触发信号时，将暂存在高速缓存存储器中的数据复制到高速缓存区域中。 因此，数据备份方法可以将暂时存储在高速缓冲存储器中的数据快速写入物理单元，从而防止闪存存储设备中可能发生的超时问题。

公开(公告)号：US20110022787A1

公开(公告)日：2011-01-27

申请号：US12896086

申请日：2010-10-01

申请人： Chih-Kang Yeh ,  Chien-Hua Chu ,  Jia-Yi Fu

发明人： Chih-Kang Yeh ,  Chien-Hua Chu ,  Jia-Yi Fu

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/1032 ,  G06F2212/7203 ,  G06F2212/7207

摘要： A data writing method for a non-volatile memory is provided, wherein the non-volatile memory includes a data area and a spare area. In the data writing method, a plurality of blocks in a substitution area of the non-volatile memory is respectively used for substituting a plurality of blocks in the data area, wherein data to be written into the blocks in the data area is written into the blocks in the substitution area, and the blocks in the substitution area are selected from the spare area of the non-volatile memory. A plurality of temporary blocks of the non-volatile memory is used as a temporary area of the blocks in the substitution area, wherein the temporary area is used for temporarily storing the data to be written into the blocks in the substitution area.

公开(公告)号：US20100241789A1

公开(公告)日：2010-09-23

申请号：US12488220

申请日：2009-06-19

申请人： Chien-Hua Chu ,  Shu-Hua Wang

发明人： Chien-Hua Chu ,  Shu-Hua Wang

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G06F12/0246 ,  G06F2212/7202

摘要： A data storage method for a flash memory storage device is provided. The method includes disposing a pattern identification unit in the flash memory storage device and disposing a pattern analysis unit in a host connected to the flash memory storage device. The method further includes analyzing a usage pattern of each flash memory storage address in the flash memory storage device by using the pattern analysis unit, receiving information from the pattern analysis unit through the pattern identification unit to identify the usage pattern of each flash memory storage address, and storing data into each flash memory storage address through a corresponding process according to the usage pattern of the flash memory storage address. Thereby, data can be stored according to the usage pattern of each flash memory storage address, and accordingly the speed of storing data into the flash memory storage device can be effectively increased.

摘要翻译： 提供了一种用于闪速存储器存储装置的数据存储方法。 该方法包括将图案识别单元设置在闪速存储器存储装置中，并且将模式分析单元设置在连接到闪存存储装置的主机中。 该方法还包括通过使用模式分析单元来分析闪速存储器存储设备中每个闪速存储器存储地址的使用模式，通过模式识别单元从模式分析单元接收信息，以识别每个快闪存储器存储地址的使用模式 并且根据闪速存储器存储地址的使用模式，通过相应的处理将数据存储到每个闪速存储器存储地址中。 从而，可以根据每个闪速存储器存储地址的使用模式来存储数据，因此可以有效地增加将数据存储到闪速存储器存储装置中的速度。

公开(公告)号：US20100205352A1

公开(公告)日：2010-08-12

申请号：US12413071

申请日：2009-03-27

申请人： Chien-Hua Chu ,  Chih-Kang Yeh ,  Kok-Yong Tan

发明人： Chien-Hua Chu ,  Chih-Kang Yeh ,  Kok-Yong Tan

IPC分类号： G06F12/02 ,  G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/7202 ,  G11C11/5628 ,  G11C29/82

摘要： A multi level cell (MLC) NAND flash memory storage system is provided. A controller of the MLC NAND flash memory storage system declares it a signal level cell (SLC) NAND flash memory chip to a host system connected thereto and provides a plurality of SLC logical blocks to the host system. When the controller receives a write command and a user data from the host system, the controller writes the user data into a page of a MLC physical block and records the page of the SLC logical block corresponding to the page of the MLC physical block. When the controller receives an erase command from the host system, the controller writes a predetermined data into the page of the MLC physical block mapped to the SLC logical block to be erased, wherein the predetermined data has the same pattern as a pattern of the erased page.

摘要翻译： 提供了多级单元（MLC）NAND闪存存储系统。 MLC NAND闪存存储系统的控制器将信号级单元（SLC）NAND闪速存储器芯片声明到连接到其的主机系统，并向主机系统提供多个SLC逻辑块。 当控制器从主机系统接收写入命令和用户数据时，控制器将用户数据写入MLC物理块的页面，并记录与MLC物理块的页面相对应的SLC逻辑块的页面。 当控制器从主机系统接收到擦除命令时，控制器将预定数据写入映射到要擦除的SLC逻辑块的MLC物理块的页面，其中预定数据具有与擦除的模式相同的模式 页。

公开(公告)号：US20100011151A1

公开(公告)日：2010-01-14

申请号：US12210406

申请日：2008-09-15

申请人： Chien-Hua Chu ,  Chih-Kang Yeh

发明人： Chien-Hua Chu ,  Chih-Kang Yeh

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F3/0605 ,  G06F3/0659 ,  G06F3/067 ,  G06F12/1408 ,  G06F21/79 ,  G06F2212/7201

摘要： A data accessing method, and a storage system and a controller using the same are provided. The data accessing method is suitable for a flash memory storage system having a data perturbation module. The data accessing method includes receiving a read command from a host and obtaining a logical block to be read and a page to be read from the read command. The data accessing method also includes determining whether a physical block in a data area corresponding to the logical block to be read is a new block and transmitting a predetermined data to the host when the physical block corresponding to the logical block to be read is a new block. Thereby, the host is prevented from reading garbled code from the flash memory storage system having the data perturbation module.

摘要翻译： 提供数据访问方法，以及存储系统和使用该方法的控制器。 数据访问方法适用于具有数据扰动模块的闪存存储系统。 数据访问方法包括从主机接收读取命令并从读取命令获得要读取的逻辑块和要读取的页面。 数据存取方法还包括确定与要读取的逻辑块相对应的数据区中的物理块是否为新块，并且当与待读取的逻辑块相对应的物理块为新时，将该预定数据发送给主机 块。 由此，防止主机从具有数据扰动模块的闪速存储器存储系统读取乱码。

公开(公告)号：US20090307413A1

公开(公告)日：2009-12-10

申请号：US12197477

申请日：2008-08-25

申请人： Chien-Hua Chu

发明人： Chien-Hua Chu

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F2212/1032 ,  G06F2212/7202 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/105

摘要： A data writing method for a multi-level cell (MLC) NAND flash memory and a storage system and a controller using the same are provided. The flash memory includes a plurality of blocks. Each of the blocks includes a plurality of page addresses. The page addresses are categorized into a plurality of upper page addresses and a plurality of lower page addresses. The writing speed of the lower page addresses is faster than that of the upper page addresses. The data writing method includes receiving a writing command and data and writing the data into a page address. The page address is skipped when it is an upper page address and a corresponding lower page address stores a valid data written by a previous writing command. Thereby, the accuracy of the data written by the previous writing command is ensured when a programming error occurs to the flash memory.

摘要翻译： 提供了一种用于多电平单元（MLC）NAND闪速存储器和存储系统以及使用其的控制器的数据写入方法。 闪存包括多个块。 每个块包括多个页地址。 页面地址被分为多个页面地址和多个下部页面地址。 较低页地址的写入速度比上页地址的写入速度要快。 数据写入方法包括接收写入命令和数据，并将数据写入页面地址。 当页面地址为上一页地址时，页面地址被跳过，相应的下页地址存储由先前写入命令写入的有效数据。 因此，当闪存的编程错误发生时，确保由先前写入命令写入的数据的精度。

公开(公告)号：US20090172256A1

公开(公告)日：2009-07-02

申请号：US12047144

申请日：2008-03-12

申请人： Chien-Hua Chu ,  Wei-Chen Teo

发明人： Chien-Hua Chu ,  Wei-Chen Teo

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F2212/7203

摘要： A data writing method for a block of a multi level cell NAND flash memory including upper page addresses and lower page addresses is provided, wherein a writing speed at the lower page addresses is higher than that at the upper page addresses. The data writing method includes receiving a writing command and determining whether an address to be written with new data in the writing command is the upper page address of the block. The method also includes copying old data previously recorded on the lower page addresses of the block as an old data backup when the address to be written in the writing command is the upper page address of the block and then writing the new data to the address to be written. Thus, old data may be protected while writing data to the upper page address of the multi level cell NAND flash memory.

摘要翻译： 提供了包括上页地址和下页地址的多电平单元NAND闪存块的数据写入方法，其中低页地址处的写入速度高于上页地址。 数据写入方法包括接收写入命令并确定写入命令中要写入新数据的地址是否是块的高位址。 该方法还包括将要写入写入命令的地址作为块的高字节地址，然后将新数据写入地址，将先前记录在块的较低页地址上的旧数据复制为旧数据备份 被写 因此，在将数据写入多电平单元NAND闪速存储器的上部页地址时可以保护旧的数据。

公开(公告)号：US08775874B2

公开(公告)日：2014-07-08

申请号：US13591236

申请日：2012-08-22

申请人： Chien-Hua Chu

发明人： Chien-Hua Chu

IPC分类号： G06F11/00

CPC分类号： G06F12/0246 ,  G06F2212/1036 ,  G06F2212/403 ,  G06F2212/7211 ,  G11C2211/5641

摘要： A data protection method adapted to a rewritable non-volatile memory module having a plurality of physical blocks is provided. The data protection method includes following steps. If the rewritable non-volatile memory module is powered on, a power-off period from last time the rewritable non-volatile memory module is powered off till present is obtained. If the power-off period is longer than a time threshold, whether each physical block satisfies an update condition is determined according to a block information of the physical block. An update procedure is executed on the physical blocks that satisfy the update condition. The update procedure is configured to read data from a physical block and rewrite the data into one of the physical blocks. Thereby, data in the physical blocks is protected from being easily lost, and the lifespan of the rewritable non-volatile memory module is prolonged.

摘要翻译： 提供了一种适用于具有多个物理块的可重写非易失性存储器模块的数据保护方法。 数据保护方法包括以下步骤。 如果可重写非易失性存储器模块通电，则可以从上一次断开可重写非易失性存储器模块断电直到存在。 如果断电时间长于时间阈值，则根据物理块的块信息确定每个物理块是否满足更新条件。 对满足更新条件的物理块执行更新过程。 更新过程被配置为从物理块读取数据并将数据重写为物理块之一。 从而保护物理块中的数据免于容易丢失，并且延长了可重写非易失性存储器模块的寿命。

公开(公告)号：US08775760B2

公开(公告)日：2014-07-08

申请号：US13479293

申请日：2012-05-24

申请人： Chien-Hua Chu

发明人： Chien-Hua Chu

IPC分类号： G06F12/06 ,  G06F13/42 ,  G06F12/02

CPC分类号： G06F12/0646 ,  G06F12/0246 ,  G06F13/42 ,  G06F2212/7206 ,  G11C16/20

摘要： A system operation method for controlling a rewritable non-volatile memory module is provided. The rewritable non-volatile memory module includes a plurality of physical blocks. The system operation method includes following steps. A first signal is received from a host system through a host interface. Whether a system setting of the host interface is to be modified is determined. If the system setting is to be modified, a system parameter is read from the physical blocks, and the system setting is modified according to the system parameter. A second signal is transmitted to the host system to establish a connection recognition between the rewritable non-volatile memory module and the host system. Thereby, the settings of transmission between the host system and the rewritable non-volatile memory module are made more flexible.

摘要翻译： 提供了一种用于控制可重写非易失性存储器模块的系统操作方法。 可重写非易失性存储器模块包括多个物理块。 系统操作方法包括以下步骤。 通过主机接口从主机系统接收到第一个信号。 确定主机接口的系统设置是否被修改。 如果要修改系统设置，则从物理块读取系统参数，并根据系统参数修改系统设置。 第二信号被发送到主机系统以在可重写非易失性存储器模块和主机系统之间建立连接识别。 由此，主机系统和可重写非易失性存储器模块之间的传输设置变得更加灵活。