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41.发明授权公开(公告)号：US10660206B2
公开(公告)日：2020-05-19
申请号：US16160622
申请日：2018-10-15
申请人： DELL PRODUCTS, L.P.
摘要： An information handling system (IHS) has a circuit board assembly with a dual-sided interposer substrate that is inserted between a baseboard and a processor integrated circuit having a second pattern of electrical contacts. The dual interposer substrate formed of a stack of printed circuit boards (PCBs) provides communication channels between a first coupling pad on the baseboard that has a first pattern of electrical contacts and a second coupling pad on top of the dual interposer substrate that provides the second pattern of electrical contacts. The second pattern receives another type of processor integrated circuit than a type supported by the first pattern. Stacked vias formed through the stack of PCBs electrically connect respective electrical contacts of the first and second coupling pads to form a corresponding communication channel. One or more grounded vias mitigate signal integrity (SI) anomalies on the communication channels.
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公开(公告)号：US10609814B2
公开(公告)日：2020-03-31
申请号：US16414078
申请日：2019-05-16
申请人： Dell Products L.P.
发明人： Umesh Chandra , Bhyrav M. Mutnury
摘要： A differential trace pair system includes a first conductive layer that is located immediately adjacent a first insulating layer. The system includes a second conductive layer that is located immediately adjacent the first insulating layer and opposite the first insulating layer from the first conductive layer, and includes an aperture that extends through the second conductive layer. A second insulating layer is located immediately adjacent the second conductive layer and opposite the second conductive layer from the first insulating layer. The system includes a first differential trace pair that is included in the second insulating layer and that includes a first differential trace that is positioned adjacent the aperture and references the second conductive layer, and a second differential trace that is longer than the first differential trace and that includes a first portion that is positioned adjacent the second conductive layer aperture and references the first conductive layer.
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公开(公告)号：US20200029425A1
公开(公告)日：2020-01-23
申请号：US16041315
申请日：2018-07-20
申请人： Dell Products L.P.
摘要： A differential pair group equalization system includes a board providing a differential trace pair group with a plurality of differential trace pairs, each of a transmitter device and a receiver device are coupled to the board and the differential trace pairs in the differential trace pair group. At least one of the transmitter device and the receiver device operates to identify a first differential trace pair in the differential trace pair group, and adjust second differential trace pair equalization parameters for a second differential trace pair in the differential trace pair group. If it is determined that first differential trace pair signal transmission capabilities for the first differential trace pair have improved in response to the adjustment of the second differential trace pair equalization parameters for the second differential trace pair the second differential trace pair equalization parameters are set for the second differential trace pair.
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公开(公告)号：US20190261505A1
公开(公告)日：2019-08-22
申请号：US16295228
申请日：2019-03-07
申请人： Dell Products L.P.
发明人： Bhyrav M. Mutnury , Chun-Lin Liao
摘要： In one or more embodiments, a circuit board may include a trace pair and a serpentine region of the trace pair, which may include: a first subregion in which the first trace includes a first portion that has a third width and a first length and in which the second trace includes a second portion, at least substantially parallel to the first portion, that has a fourth width, greater than the second width, and a second length; and a second subregion, adjacent to the first subregion, in which the first trace includes a third portion that has the third width and a third length and in which the second trace includes a third portion that has the fourth width and a third length, different from the second length.
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公开(公告)号：US10368437B2
公开(公告)日：2019-07-30
申请号：US15480611
申请日：2017-04-06
申请人： DELL PRODUCTS, L.P.
发明人： Sandor Farkas , Bhyrav M. Mutnury
摘要： A cable assembly includes a printed circuit board having a first surface and a second surface. A first post and a second post extend from one side of the printed circuit board. A first signal pad, a second signal pad, and a first ground pad are each coupled to the first surface. A first cable has a first signal wire at least partially covered by a first insulator and a second signal wire at least partially covered by a second insulator. The first cable further has a first ground shield at least partially covering the first and second insulators. A first end of a first cable is mounted between the first and second posts. A conductive attachment couples the first ground shield to the first ground pad.
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公开(公告)号：US20190215196A1
公开(公告)日：2019-07-11
申请号：US15864438
申请日：2018-01-08
申请人： Dell Products L.P.
发明人： Arun R. Chada , Han Deng , Bhyrav M. Mutnury
摘要： An information handling system communicates information across a physical link with high and low signal values sent at a unit interval. Feed forward equalization improves signal transfer with pre-emphasis of low-to-high signals and de-emphasis of high-to-low signals lasting for a fraction of the unit interval, such as one-half or one-quarter of the unit interval. Fractional unit interval pre-emphasis and de-emphasis reduce inter symbol interference to improve frequency domain eye structure at the physical link receiver.
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公开(公告)号：US10299370B1
公开(公告)日：2019-05-21
申请号：US15927668
申请日：2018-03-21
申请人： Dell Products L.P.
发明人： Umesh Chandra , Bhyrav M. Mutnury
摘要： A differential trace pair system includes a first conductive layer that is located immediately adjacent a first insulating layer. The system includes a second conductive layer that is located immediately adjacent the first insulating layer and opposite the first insulating layer from the first conductive layer, and includes an aperture that extends through the second conductive layer. A second insulating layer is located immediately adjacent the second conductive layer and opposite the second conductive layer from the first insulating layer. The system includes a first differential trace pair that is included in the second insulating layer and that includes a first differential trace that is positioned adjacent the aperture and references the second conductive layer, and a second differential trace that is longer than the first differential trace and that includes a first portion that is positioned adjacent the second conductive layer aperture and references the first conductive layer.
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公开(公告)号：US20170231091A1
公开(公告)日：2017-08-10
申请号：US15019369
申请日：2016-02-09
申请人： Dell Products, L.P.
CPC分类号： H05K1/115 , H05K1/0251 , H05K1/0298 , H05K3/0047 , H05K3/0055 , H05K3/429 , H05K2203/1476
摘要： Systems and methods for grooved vias are described. For example, a method may include: drilling a via hole in a Printed Circuit Board (PCB), where the PCB comprises a first layer having a first trace and a second layer having a second trace, the via hole includes a first portion between the first layer and the second layer and a second portion between the second layer and a bottom surface of the PCB, and the via hole is configured to couple the first trace to the second trace through the first portion; after drilling the via hole, creating a rough internal surface in at least the second portion of the via hole that is configured to reduce a resonance of a signal transmitted from the first trace to the second trace; and forming a via by filling the first and second portions of the via hole with conductive material.
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公开(公告)号：US20160254872A1
公开(公告)日：2016-09-01
申请号：US15150594
申请日：2016-05-10
申请人： Dell Products L.P.
IPC分类号： H04B17/309 , H04B17/10
CPC分类号： H04B17/309 , H04B17/104
摘要： In accordance with embodiments of the present disclosure, a method for characterizing electrical characteristics of a communication channel between a transmitter of a first information handling resource and a receiver of a second information handling resource may include receiving a test signal at the receiver from the transmitter during an in-situ characterization mode of the second information handling resource, converting the test signal into a discrete-time digital signal representing the test signal, generating a discrete-time finite difference function comprising a first derivative of the discrete-time digital signal, transforming the discrete-time finite difference function into a frequency-domain transform of the discrete-time finite difference function.
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公开(公告)号：US09363026B2
公开(公告)日：2016-06-07
申请号：US14052050
申请日：2013-10-11
申请人： Dell Products L.P.
IPC分类号： H04B17/00 , H04B17/309 , H04B17/10
CPC分类号： H04B17/309 , H04B17/104
摘要： In accordance with embodiments of the present disclosure, a method for characterizing electrical characteristics of a communication channel between a transmitter of a first information handling resource and a receiver of a second information handling resource may include receiving a test signal at the receiver from the transmitter during an in-situ characterization mode of the second information handling resource, converting the test signal into a discrete-time digital signal representing the test signal, generating a discrete-time finite difference function comprising a first derivative of the discrete-time digital signal, transforming the discrete-time finite difference function into a frequency-domain transform of the discrete-time finite difference function.
摘要翻译： 根据本公开的实施例，用于表征第一信息处理资源的发射机和第二信息处理资源的接收机之间的通信信道的电特性的方法可以包括：在接收机处从发射机接收测试信号， 第二信息处理资源的原位表征模式，将测试信号转换成表示测试信号的离散时间数字信号，产生包括离散时间数字信号的一阶导数的离散时间有限差分函数，变换 将离散时间有限差分函数转换为离散时间有限差分函数的频域变换。
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