Abstract:
An SLM PWM clocking method, called “jog clear,” for generating short bit periods where block data clears (74) are inserted between block data loads (72, 76) within a frame refresh period. The method significantly reduces the short bit duration that requires use of the earlier reset-release method and it eliminates undesirable artifacts present in these earlier SLM clocking methods.
Abstract:
A method and system of detecting whether the intensity of light incident a spatial light modulator varies periodically. One embodiment provides a method of operating a spatial light modulator, the method comprising: determining a peak level of light incident the modulator over a period of time; setting a threshold level equal to a fraction of the peak level; monitoring a current level of light incident the modulator; comparing the current level of light and the threshold level; and disabling the modulator based on the comparison. Another embodiment provides a modulator array. The modulator comprises: a photosensitive circuit for outputting a light intensity signal representative of a level of light incident the photosensitive circuit; a threshold detection circuit 400 receiving the light intensity signal 402 and outputting an under threshold signal 408 indicative of whether the intensity signal is less than a threshold level; and a duty cycle detection circuit 410 for monitoring the under threshold signal 408 and outputting a disable signal 418 indicative of the duty cycle of the under threshold signal 408. The preceding abstract is submitted with the understanding that it only will be used to assist in determining, from a cursory inspection, the nature and gist of the technical disclosure as described in 37 C.F.R. §1.72(b). In no case should this abstract be used for interpreting the scope of any patent claims.
Abstract:
An SLM-based video receiver (10) receives a video input of some standardized format at a signal interface unit (11) and passes the input to a processor (12). The processor (12) performs analog-to-digital conversion if the pixel data is analog and also performs other enhancements to prepare the pixel data for loading into a video memory (14). The pixel data from the processor (12), representing a field of pixel data, is stored into the memory (14) for loading into rows of pixel elements of a spatial light modulator (16). The spatial light modulator (16) receives the pixel data in rows and each individual pixel element responds accordingly. The pixel elements of the spatial light modulator (16) emit light or reflect light from a source (18) and generate a video frame for display on a screen (20). By exploiting the addressing functions of the spatial light modulator (16), the SLM-based video receiver (10) displays a video frame using a field of pixel data.
Abstract:
A method of automatically generating a load/reset sequence for a display system having a spatial light modulator whose display elements that are loaded with data and reset between loads (FIG. 7). Bit-planes of data are classified according to their display times as normal, short, or reset-release (FIG. 5). Extra time of normal bit-planes is calculated (FIG. 5). The display times of normal bit-planes are adjusted by subtracting or adding extra time, such that any normal bit-plane displayed before a short or reset-release bit-plane includes sufficient extra time to allow for loading the short or reset-release bit-plane (FIG. 7). Also, reset conflicts are detected and avoided (FIGS. 7, 8, 9A and 9B).
Abstract:
A method of implementing pulse-width modulation in a display system (10, 20) that uses a spatial light modulator (SLM) (15) Each frame of data is divided into bit-planes, each bit-plane having one bit of data for each pixel of the SLM and representing a bit weight of the intensity value to be displayed by the pixels. Each bit-plane has a display time corresponding to a portion of the frame period, with bit-planes of more significant bits having longer portions. Then, the display times for one or more of the more significant bits are segmented so that the data for those bits can be displayed in segments rather than for a continuous time. (FIG. 3A). The segments are distributed throughout the frame period to reduce visual artifacts. (FIG. 3B).
Abstract:
A method for expanding pulse width modulation sequences that control a display system to adapt to varying video frame times. A minimal amount of extra circuitry (10) is provided that regulates a sequencer (26). After calculating the appropriate expansion factor needed to stretch a base sequence, the system control circuit (22) sends that information to the circuitry (10). The circuitry (10) includes a counter (14) that repetitively counts down a number of clock cycles and causes the clock to drop a cycle. This dropping of clock cycles causes the sequence time to be expanded, as it takes the system longer to reach the necessary number of clock cycles that determine a sequence. Several base pulse width modulation sequences could be stored in memory, each of which can be used for a range of frame times, eliminating the need for one sequence for every possible variation in the frame time.
Abstract:
A DMD display system includes an inverse gamma look-up-table (50) for converting raster scanned, gamma corrected video data of 8 bits to 12 bits inverse gamma data with 8 most significant bits (msb) and 4 least significant bits (lsb). The 8 msb are coupled to the micromirror of the DMD display (10) and the four lsb are delayed and halved such that one half of the lsb is added to the next pixel in the horizontal scan and one-half of the lsb is added to the next vertical pixel one line length delayed.
Abstract:
A method and system for improved display of digital video data. The data is arranged into bit plies according to the binary weight of each bit per pixel. The bit planes are then translated into non-binary weighted bit planes by bit translation circuitry (22). These non-binary bit planes are transmitted to the activation circuitry of a spatial light modulator array (30), such that each non-binary bit is displayed at symmetrical times around at least one predetermined point within a video frame time, eliminating visual artifacts associated with binary pulse-width modulation.
Abstract:
A method and system for accentuating intense white display areas in sequential DMD video systems includes generating a special signal for each pixel that indicates whether to boost the intensity of that pixel in all colors. The method further includes enabling the mirrors to be turned on during times of color boundary of the color wheel such that DMD with mirrors receives different mixes of color light that are integrated together to produce intense white. The system may include degamma lookup tables for each color. The degamma lookup tables are augmented when the special signal is generated.
Abstract:
An SLM-based digital display system (10) having a graphics display subsystem (13 and 18) for closed captioning, on-screen displays, and other graphics images that are overlaid on the video image. The graphics display subsystem (13 and 18) has a graphics processor (21) that prepares the graphics data, which is inserted into the video data path after video data processing and prior to a look-up table unit (27). A select logic unit (24) provides a control signal to a multiplexer (26) that selects between video data and graphics data for input to the look-up table unit (27). The look-up table unit (27) performs its mapping according to the type of data received, such as by linearizing video data or palletizing graphics data.