公开(公告)号：US20060064207A1

公开(公告)日：2006-03-23

申请号：US10944128

申请日：2004-09-17

申请人： Dale Hiltner ,  Brian Lee

发明人： Dale Hiltner ,  Brian Lee

IPC分类号： G05D1/00

CPC分类号： G05D1/0066

摘要： Methods for analyzing system operator coupling susceptibility are described herein. In one embodiment, an open loop frequency response can be compared to a related over-steer point. An over-steer point can be the condition where, as operator gain is increased for an open loop system, the corresponding closed loop gain at a corresponding resonance peak increases by at least approximately the same amount as the increase in operator gain or at least approximately a selected larger amount than the increase in operator gain. In other embodiments, an open loop frequency response can be compared to a critical gain rate. The critical gain rate can be the rate of change of open loop gain per open loop phase angle of the corresponding open loop system response at an over-steer point that is associated with a zero decibel closed loop gain.

摘要翻译： 本文描述了分析系统操作者耦合敏感性的方法。 在一个实施例中，可以将开环频率响应与相关过转向点进行比较。 过度转向点可以是当开环系统增加操作者增益时，相应的共振峰值处的相应的闭环增益与操作者增益的增加至少大致相同的量，或至少约为 选择的量大于操作者增益的增加。 在其他实施例中，开环频率响应可以与临界增益率进行比较。 关键增益率可以是在与零分贝闭环增益相关联的过转向点处的相应开环系统响应的每个开环相位角的开环增益的变化率。

公开(公告)号：US20050136492A1

公开(公告)日：2005-06-23

申请号：US10872818

申请日：2004-06-21

申请人： David Phelps ,  Gary Johnson ,  Brian Lee ,  Zbigniew Darzynkiewicz ,  Jerzy Grabarek

发明人： David Phelps ,  Gary Johnson ,  Brian Lee ,  Zbigniew Darzynkiewicz ,  Jerzy Grabarek

IPC分类号： C12Q1/37 ,  G01N33/573 ,  G01N33/574

CPC分类号： G01N33/573 ,  C12Q1/37 ,  G01N33/574

摘要： The invention provides assay methods and reagents useful for evaluating the level of enzyme activities within living cells. Enzyme activity levels within living cells, such as caspases and Serine proteases, can be key determinates in assessing; 1) the apoptotic state of a cell, 2) the presence of tumor (cancer) cells, 3) the predictive efficacy of a chemotherapeutic treatment regimen using a particular therapeutic agent or process, 4) the probability of graft rejection or acceptance, identification of the up or down regulation relationships of serine proteases and caspases within living cell systems, provides a rapid, yet finely tuned mechanism for predicting the current and future state of these cell populations, and 5) the disease state status of a cell.

摘要翻译： 本发明提供了可用于评估活细胞内酶活性水平的测定方法和试剂。 活细胞内的酶活性，如胱天蛋白酶和丝氨酸蛋白酶，可以作为评估中的关键决定因素。 1）细胞的凋亡状态，2）肿瘤（癌症）细胞的存在，3）使用特定治疗剂或过程的化学治疗方案的预测效果，4）移植排斥或接受的概率，鉴定 丝氨酸蛋白酶和半胱氨酸蛋白酶在活细胞系统中的向上或向下调节关系为预测这些细胞群体的当前和未来状态提供了一种快速但精细调节的机制，以及5）细胞的疾病状态。

公开(公告)号：US06633296B1

公开(公告)日：2003-10-14

申请号：US09579432

申请日：2000-05-26

申请人： Indra Laksono ,  Milivoje Aleksic ,  Antonio Asaro ,  Andrew E. Gruber ,  Gordon Caruk ,  Brian Lee

发明人： Indra Laksono ,  Milivoje Aleksic ,  Antonio Asaro ,  Andrew E. Gruber ,  Gordon Caruk ,  Brian Lee

IPC分类号： G06F1516

CPC分类号： G06F3/14 ,  G09G5/363 ,  G09G2352/00 ,  G09G2360/06

摘要： In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.

摘要翻译： 在具体实施例中，公开了一种用于提供视频的系统，该系统具有系统总线，其在一个实施例中是高级图形端口（AGP）总线。 系统总线连接到连接到第二和第三AGP总线的数据桥。 每个AGP总线都连接到图形处理器。 桥接器基于存储在路由表或寄存器组中的存储器映射信息，将数据请求从一个图形处理器路由到第二图形处理器而不访问系统AGP总线。 在本发明的另一方面，桥接器使用可以根据特定操作模式而变化的属性来响应初始化请求。 本发明的另一方面允许在各种AGP协议部分之间进行转换

公开(公告)号：US06475906B1

公开(公告)日：2002-11-05

申请号：US09898125

申请日：2001-07-05

申请人： Brian Lee

发明人： Brian Lee

IPC分类号： H01L214763

CPC分类号： H01L27/10894 ,  H01L21/2236 ,  H01L21/76897 ,  H01L27/10829 ,  H01L27/10873

摘要： An improved etch sequence and an improved integration scheme of plasma doping in the fabrication of a DRAM integrated circuit device are described. Semiconductor device structures are provided in and on a substrate wherein the substrate is divided into an array area and a periphery area. The semiconductor device structures are covered with a dielectric layer. The dielectric layer is concurrently etched through in the array area to form bit line contact openings and in the periphery area to form substrate contact openings. Doped regions are formed in the substrate exposed within the bit line contact openings and the substrate contact openings using a plasma doping process. Next, the dielectric layer is etched through to form a gate contact opening. Thereafter, the bit line contact openings, the substrate contact openings, and the gate contact opening are filled with a conducting layer to complete forming contacts in the fabrication of a DRAM integrated circuit.

摘要翻译： 描述了在DRAM集成电路器件的制造中改进的蚀刻顺序和改进的等离子体掺杂的集成方案。 半导体器件结构设置在衬底中和衬底上，其中衬底被分成阵列区域和外围区域。 半导体器件结构被电介质层覆盖。 电介质层同时蚀刻在阵列区域中以形成位线接触开口，并且在周边区域中形成衬底接触开口。 使用等离子体掺杂工艺在掺杂在位线接触开口和衬底接触开口内的衬底中形成掺杂区域。 接下来，蚀刻通孔以形成栅极接触开口。 此后，在DRAM集成电路的制造中，位线接触开口，基板接触开口和栅极接触开口填充有导电层以完成成形接触。

公开(公告)号：US06214661B1

公开(公告)日：2001-04-10

申请号：US09489771

申请日：2000-01-21

申请人： Heon Lee ,  Young-Jin Park ,  Young Limb ,  Brian Lee ,  Kilho Lee ,  Satish Athavale ,  Jai-hoon Sim

发明人： Heon Lee ,  Young-Jin Park ,  Young Limb ,  Brian Lee ,  Kilho Lee ,  Satish Athavale ,  Jai-hoon Sim

IPC分类号： H01L218242

CPC分类号： H01L28/75 ,  H01L27/10852 ,  H01L28/55

摘要： In a method of forming a microelectronic structure of a Pt/BSTO/Pt capacitor stack for use in a DRAM device, the improvement comprising substantially eliminating or preventing oxygen out-diffusion from the BSTO material layer, comprising: a) preparing a bottom Pt electrode formation; b) subjecting the bottom Pt electrode formation to an oxygen plasma treatment to form an oxygen enriched Pt layer on the bottom Pt electrode; c) depositing a BSTO layer on said oxygen enriched Pt layer; d) depositing an upper Pt electrode layer on the BSTO layer; e) subjecting the upper Pt electrode layer to an oxygen plasma treatment to form an oxygen incorporated Pt layer; and f) depositing a Pt layer on the oxygen incorporated Pt layer upper Pt elect.

摘要翻译： 在形成用于DRAM器件的Pt / BSTO / Pt电容器堆叠的微电子结构的方法中，改进包括基本上消除或防止BSTO材料层的氧扩散，包括：a）制备底部Pt电极 b）使底Pt层电极形成氧气等离子体处理，在底Pt电极上形成富氧Pt层; c）在所述富氧Pt层上沉积BSTO层; d）将上Pt电极层沉积在 BSTO层; e）使上Pt电极层进行氧等离子体处理以形成掺入氧的Pt层; 以及）在配有氧的Pt层上部Pt上沉积Pt层。

公开(公告)号：US5133675A

公开(公告)日：1992-07-28

申请号：US692109

申请日：1991-04-26

申请人： Jay Garthwaite ,  Kenneth Hotchkiss ,  Arthur B. Woodward ,  Brian Lee ,  Walter C. Lewis ,  Ferdinand E. Orbeta

发明人： Jay Garthwaite ,  Kenneth Hotchkiss ,  Arthur B. Woodward ,  Brian Lee ,  Walter C. Lewis ,  Ferdinand E. Orbeta

IPC分类号： H01R4/24 ,  H01R13/595

CPC分类号： H01R13/595 ,  H01R24/62 ,  H01R4/2416

摘要： The present invention teaches a modular telephone jack "system" capable of voice and data applications, which may be relatively flush-mounted within a conventional electrical box or to a surface and which is characterized by the absence of conventional screw terminal technology. A lacing strain relief system facilitates connections in terminal clips which face forward and which are accessible from the front of the system for testing and repair through a snap-off face or cover plate, and facilitates relatively rapid installation and easy access for testing, troubleshooting and wiring. The system may be equipped with combinations of duplex modular jacks of similar outer configurations, such as four, six and eight-conductor versions. The system includes its own "universal" surface-mounting housing of box, where needed.

摘要翻译： 本发明教导了能够进行语音和数据应用的模块化电话插孔“系统”，其可以相对平面地安装在常规电气箱内或表面上，其特征在于不存在常规的螺钉端子技术。 系带应变消除系统便于在前端的端子夹中进行连接，可从系统前部进入，以便通过卡口面或盖板进行测试和修理，并且可以方便相对快速的安装，方便访问以进行测试，故障排除和 接线。 该系统可以配备有类似外部配置的双工模块插座的组合，例如四个，六个和八个导体版本。 该系统在需要时包括自己的“通用”表面安装外壳。

公开(公告)号：US5013004A

公开(公告)日：1991-05-07

申请号：US393383

申请日：1989-08-14

申请人： Andre P. Wilkins ,  Brian Lee

发明人： Andre P. Wilkins ,  Brian Lee

IPC分类号： B31B19/86 ,  B65B61/14 ,  B65D73/00

CPC分类号： B65D73/0071 ,  B65B61/14 ,  B31B2219/9077 ,  Y10S206/806 ,  Y10T24/45534

摘要： A suspension pack for supporting articles in point-of-sale advertising. The suspension pack includes a body folded to provide wall portions in face-to-face contact, and a suspension member extending through a slit in the fold. A base portion of the suspension member has at least one resilient tongue which engages the fold to resist withdrawal of the suspension member from the body.

公开(公告)号：US20190110563A1

公开(公告)日：2019-04-18

申请号：US16160031

申请日：2018-10-15

申请人： Sang Beom Lee ,  Do Hyun Lee ,  Brian Lee

发明人： Sang Beom Lee ,  Do Hyun Lee ,  Brian Lee

IPC分类号： A45B11/04 ,  A45B19/02

摘要： A collapsible canopy device includes an assembly including a water-resistant canopy operatively attached to a resilient, flexible metallic band extending around a perimeter of the water resistant canopy, the assembly having attached thereto at least one holder extendible from the assembly, wherein the assembly is reversibly collapsible via twisting and folding the assembly.

公开(公告)号：US08544625B2

公开(公告)日：2013-10-01

申请号：US13271114

申请日：2011-10-11

申请人： Brian Lee ,  Jeffrey Hemphill

发明人： Brian Lee ,  Jeffrey Hemphill

IPC分类号： F16D41/08

CPC分类号： F16D41/088

摘要： The over-running bi-directional clutch is used to synchronize gears in a transmission to allow for locking and unlocking the gears in an efficient manner.

摘要翻译： 过载双向离合器用于同步传动装置中的齿轮，以有效地锁定和解锁齿轮。

公开(公告)号：US08537587B2

公开(公告)日：2013-09-17

申请号：US13243814

申请日：2011-09-23

申请人： Hai Li ,  Yiran Chen ,  Yuan Yan ,  Brian Lee ,  Ran Wang

发明人： Hai Li ,  Yiran Chen ,  Yuan Yan ,  Brian Lee ,  Ran Wang

IPC分类号： G11C5/06

CPC分类号： G11C7/02 ,  G11C7/06 ,  G11C11/1673 ,  G11C11/1693

摘要： A method and apparatus for accessing a non-volatile memory cell. In some embodiments, a memory block provides a plurality of memory cells arranged into rows and columns. A read circuit is configured to read a selected row of the memory block by concurrently applying a control voltage to each memory cell along the selected row and, for each column, using a respective local sense amplifier and a column sense amplifier to successively differentiate a voltage across the associated memory cell in said column to output a programmed content of the row.

摘要翻译： 一种用于访问非易失性存储单元的方法和装置。 在一些实施例中，存储块提供布置成行和列的多个存储器单元。 读取电路被配置为通过同时向沿着所选行的每个存储器单元施加控制电压并且对于每列使用相应的本地读出放大器和列读出放大器来连续地区分电压来读取存储器块的选定行 在所述列中的相关联的存储器单元之间输出该行的编程内容。