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    Metal-free fuse structures
    43.
    发明授权
    Metal-free fuse structures 有权

    公开(公告)号：US11469178B2

    公开(公告)日：2022-10-11

    申请号：US17126921

    申请日：2020-12-18

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Anthony K. Stamper ,  John J. Ellis-Monaghan ,  Steven M. Shank ,  John J. Pekarik ,  Vibhor Jain

    IPC: H01L23/525 ,  H01L27/12 ,  H01L23/532

    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a metal-free fuse structure and methods of manufacture. The structure includes: a first metal-free fuse structure comprising a top semiconductor material of semiconductor-on-insulator (SOI) technologies, the top semiconductor material including end portions with a first electrical resistance and a fuse portion of a second, higher electrical resistance electrically connected to the end portions; and a second metal-free fuse structure comprising the top semiconductor material of semiconductor-on-insulator (SOI) technologies, the top semiconductor material of the second metal-free fuse structure including at least a fuse portion of a lower electrical resistance than the second, higher electrical resistance.

    Field effect transistor (FET) stack and methods to form same
    44.
    发明授权
    Field effect transistor (FET) stack and methods to form same 有权

    公开(公告)号：US11411081B2

    公开(公告)日：2022-08-09

    申请号：US16855236

    申请日：2020-04-22

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Steven M. Shank ,  Anthony K. Stamper ,  Vibhor Jain ,  John J. Ellis-Monaghan

    IPC: H01L27/092 ,  H01L29/08 ,  H01L29/78

    Abstract: The disclosure provides a field effect transistor (FET) stack with methods to form the same. The FET stack includes a first transistor over a substrate. The first transistor includes a first active semiconductor material including a first channel region between a first set of source/drain terminals, and a first gate structure over the first channel region. The first gate structure includes a first gate insulator of a first thickness above the first channel region. A second transistor is over the substrate and horizontally separated from the first transistor. A second gate structure of the second transistor may include a second gate insulator of a second thickness above a second channel region, the second thickness being greater than the first thickness. A shared gate node may be coupled to each of the first gate structure and the second gate structure.

    HETEROJUNCTION BIPOLAR TRANSISTORS WITH UNDERCUT EXTRINSIC BASE REGIONS
    45.
    发明申请
    HETEROJUNCTION BIPOLAR TRANSISTORS WITH UNDERCUT EXTRINSIC BASE REGIONS 有权

    公开(公告)号：US20220190145A1

    公开(公告)日：2022-06-16

    申请号：US17120916

    申请日：2020-12-14

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Sarah McTaggart ,  Qizhi Liu ,  Vibhor Jain ,  Mark Levy ,  Paula Fisher ,  James R. Elliott

    IPC: H01L29/737 ,  H01L29/66

    Abstract: Device structures and fabrication methods for heterojunction bipolar transistors. Trench isolation regions are positioned in a semiconductor substrate to define active regions. A base layer includes first sections that are respectively positioned over the active regions and second sections that are respectively positioned over the trench isolation regions. Emitter fingers are respectively positioned on the first sections of the base layer. The first sections of the base layer include single-crystal semiconductor material, and the second sections of the base layer include polycrystalline semiconductor material. The second sections of the base layer are spaced in a vertical direction from the trench isolation regions to define a first cavity that extends about a perimeter of the base layer and second cavities that are connected to the first cavity.

    Active x-ray attack prevention device
    50.
    发明授权
    Active x-ray attack prevention device 有权

    公开(公告)号：US11121097B1

    公开(公告)日：2021-09-14

    申请号：US16881736

    申请日：2020-05-22

    Applicant: GLOBALFOUNDRIES U.S. INC.

    Inventor： Vibhor Jain ,  Sebastian T. Ventrone ,  Siva P. Adusumilli ,  John J. Ellis-Monaghan ,  Ajay Raman

    IPC: H01L23/00 ,  H01L23/48

    Abstract: The present disclosure relates to a metal layer for an active x-ray attack prevention device for securing integrated circuits. In particular, the present disclosure relates to a structure including a semiconductor material, one or more devices on a front side of the semiconductor material, a backside patterned metal layer under the one or more devices, located and structured to protect the one or more devices from an active intrusion, and at least one contact providing an electrical connection through the semiconductor material to a front side of the backside patterned metal layer. The backside patterned metal layer is between a wafer and one of the semiconductor material and an insulator layer.

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