公开(公告)号：US20210120708A1

公开(公告)日：2021-04-22

申请号：US16659459

申请日：2019-10-21

Applicant: Intel Corporation

Inventor： Veronica Aleman Strong ,  Johanna M. Swan ,  Aleksandar Aleksov ,  Adel A. Elsherbini ,  Feras Eid

IPC: H05K9/00 ,  H01L23/60 ,  H01L21/48 ,  C08G61/12 ,  C08G73/06 ,  C08G85/00

Abstract: Embodiments may relate to a material to provide electrostatic discharge (ESD) protection in an electrical device. The material may include first and second electrically-conductive carbon allotropes. The material may further include an electrically-conductive polymer that is chemically bonded to the first and second electrically-conductive carbon allotropes such that an electrical signal may pass between the first and second electrically-conductive carbon allotropes. Other embodiments may be described or claimed.

公开(公告)号：US10937594B2

公开(公告)日：2021-03-02

申请号：US16606130

申请日：2017-06-27

Applicant: Intel Corporation

Inventor： Thomas L. Sounart ,  Aleksandar Aleksov ,  Feras Eid ,  Georgios C. Dogiamis ,  Johanna M. Swan ,  Kristof Darmawikarta

IPC: H01G4/14 ,  H05K1/02 ,  H05K1/03

Abstract: Embodiments of the invention include a microelectronic device that includes a plurality of organic dielectric layers and a capacitor formed in-situ with at least one organic dielectric layer of the plurality of organic dielectric layers. The capacitor includes first and second conductive electrodes and an ultra-high-k dielectric layer that is positioned between the first and second conductive electrodes.

公开(公告)号：US20210043541A1

公开(公告)日：2021-02-11

申请号：US16532956

申请日：2019-08-06

Applicant: Intel Corporation

Inventor： Feras Eid ,  Telesphor Kamgaing ,  Georgios Dogiamis ,  Aleksandar Aleksov ,  Johanna M. Swan

IPC: H01L23/38 ,  H01L23/498 ,  H01L27/20 ,  H01L25/18 ,  H01L23/00 ,  H01L41/053 ,  H03H9/205 ,  H01L23/14 ,  H01L23/538 ,  H01L23/66 ,  H01L23/31 ,  H01L35/32 ,  H01L23/427 ,  H03H9/05 ,  H03H9/02

Abstract: Disclosed herein are structures and assemblies that may be used for thermal management in integrated circuit (IC) packages.

公开(公告)号：US20210036685A1

公开(公告)日：2021-02-04

申请号：US16526672

申请日：2019-07-30

Applicant: Intel Corporation

Inventor： Telesphor Kamgaing ,  Feras Eid ,  Georgios Dogiamis ,  Aleksandar Aleksov ,  Johanna M. Swan

IPC: H03H9/205 ,  H03F3/24 ,  H03H9/25 ,  H01L41/053 ,  H03H9/64 ,  H03H9/54 ,  H01L25/10 ,  H01L23/10 ,  H01L23/552

Abstract: Embodiments may relate to a radio frequency (RF) front-end module (FEM) that includes a first acoustic wave resonator (AWR) die coupled with a package substrate. The RF FEM may also include a second AWR die coupled with the first AWR die. The first AWR die may be between the package substrate and the second AWR die. Other embodiments may be described or claimed.

公开(公告)号：US20210036682A1

公开(公告)日：2021-02-04

申请号：US16526633

申请日：2019-07-30

Applicant: Intel Corporation

Inventor： Telesphor Kamgaing ,  Aleksandar Aleksov ,  Feras Eid ,  Georgios Dogiamis ,  Johanna M. Swan

IPC: H03H9/05 ,  H01L23/538 ,  H01L25/18 ,  H01L27/20 ,  H01L25/00 ,  H01L41/053 ,  H01L23/00 ,  H03H9/58 ,  H01L41/047

Abstract: Embodiments may relate to a radio frequency (RF) front-end module (FEM) that includes an acoustic wave resonator (AWR) die. The RF FEM may further include an active die coupled with the package substrate of the RF FEM. When the active die is coupled with the package substrate, the AWR die may be between the active die and the package substrate. Other embodiments may be described or claimed.

公开(公告)号：US10649158B2

公开(公告)日：2020-05-12

申请号：US16098406

申请日：2016-07-01

Applicant: Intel Corporation

Inventor： Johanna M. Swan ,  Aleksandar Aleksov ,  Sasha N. Oster ,  Feras Eid ,  Baris Bicen ,  Thomas L. Sounart ,  Shawna M. Liff ,  Valluri R. Rao

IPC: G02B6/42 ,  G02B6/36

Abstract: Embodiments of the invention include an optoelectronic package that allows for in situ alignment of optical fibers. In an embodiment, the optoelectronic package may include an organic substrate. Embodiments include a cavity formed into the organic substrate. Additionally, the optoelectronic package may include an actuator formed on the organic substrate that extends over the cavity. In one embodiment, the actuator may include a first electrode, a piezoelectric layer formed on the first electrode, and a second electrode formed on the piezoelectric layer. According to an additional embodiment of the invention, the actuator may include a first portion and a second portion. In order to allow for resistive heating and actuation driven by thermal expansion, a cross-sectional area of the first portion of the beam may be greater than a cross-sectional area of the second portion of the beam.

公开(公告)号：US10593636B2

公开(公告)日：2020-03-17

申请号：US16127820

申请日：2018-09-11

Applicant: Intel Corporation

Inventor： Georgios C. Dogiamis ,  Sasha N. Oster ,  Telesphor Kamgaing ,  Adel A. Elsherbini ,  Brandon M. Rawlings ,  Feras Eid

IPC: H01L23/36 ,  H01L23/66 ,  H01L23/498 ,  H01L23/367 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065

Abstract: Embodiments of the invention may include a packaged device that includes thermally stable radio frequency integrated circuits (RFICs). In one embodiment the packaged device may include an integrated circuit chip mounted to a package substrate. According to an embodiment, the package substrate may have conductive lines that communicatively couple the integrated circuit chip to one or more external components. One of the external components may be an RFIC module. The RFIC module may comprise an RFIC and an antenna. Additional embodiments may also include a packaged device that includes a plurality of cooling spots formed into the package substrate. In an embodiment the cooling spots may be formed proximate to interconnect lines the communicatively couple the integrated circuit chip to the RFIC.

公开(公告)号：US10424559B2

公开(公告)日：2019-09-24

申请号：US15388906

申请日：2016-12-22

Applicant: Intel Corporation

Inventor： Feras Eid ,  Nader N. Abazarnia ,  Johanna M. Swan ,  Taesha D. Beasley ,  Sasha N. Oster ,  Tannaz Harirchian ,  Shawna M. Liff

IPC: H01L25/065 ,  H01L23/373 ,  H01L23/48 ,  H01L23/498 ,  H01L21/56 ,  H01L23/367 ,  H01L23/31 ,  H01L23/00

Abstract: An embodiment includes an apparatus comprising: a semiconductor die; package molding that is molded onto and conformal with a first die surface of the semiconductor die and at least two sidewalls of the semiconductor die, the package molding including: (a)(i) a first surface contacting the semiconductor die, (a)(ii) a second surface opposite the first surface, and (a)(iii) an aperture that extends from the first surface to the second surface; and a polymer substantially filling the aperture; wherein the package molding includes a first thermal conductivity (watts per meter kelvin (W/(m·K)) and the polymer includes a second thermal conductivity that is greater than the first thermal conductivity. Other embodiments are described herein.

公开(公告)号：US10314171B1

公开(公告)日：2019-06-04

申请号：US15859321

申请日：2017-12-29

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Feras Eid ,  Johanna M. Swan

IPC: H05K1/18 ,  H05K3/46 ,  H05K1/03 ,  H05K1/09 ,  H05K3/18 ,  H05K3/34

Abstract: Apparatuses, systems and methods associated with hermetic encapsulation for package assemblies are disclosed herein. In embodiments, a package assembly may include a package substrate that includes a guard ring, wherein the guard ring extends from a surface of the package substrate and around a circumference of a cavity. The package assembly may further include a component coupled to the guard ring by a solder joint along an entirety of the guard ring, wherein the cavity is located between the package substrate and the component and the cavity is hermetically-sealed via the guard ring and the solder joint. Other embodiments may be described and/or claimed.

公开(公告)号：US20190148311A1

公开(公告)日：2019-05-16

申请号：US16249457

申请日：2019-01-16

Applicant: Intel Corporation

Inventor： Feras Eid ,  Robert L. Sankman ,  Sandeep B. Sane

IPC: H01L23/00 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L23/562 ,  H01L21/485 ,  H01L21/4853 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01L2924/3511

Abstract: A microelectronic package may be fabricated with at least one compliant external bond pad having at least one integrated spring structure for mitigating the effects of warpage of the microelectronic package during attachment to an external substrate. An embodiment for the microelectronic package may include a microelectronic package substrate having a first surface and an opposing second surface, wherein the microelectronic package substrate includes a void defined therein that extends into the microelectronic package substrate from the second surface thereof, and a compliant bond pad suspended over the void, wherein the compliant bond pad includes a land portion and at least one spring portion, and wherein the at least one spring portion extends from the compliant bond pad land portion to an anchor structure on the microelectronic package substrate second surface.