Display panel
    42.
    发明授权

    公开(公告)号:US10121839B2

    公开(公告)日:2018-11-06

    申请号:US15415838

    申请日:2017-01-25

    Abstract: A display device including a TFT substrate and a display layer is provided. The TFT substrate includes a substrate, a gate layer, a semiconductor layer, a gate dielectric layer, a first electrode layer, a first passivation layer, a second passivation layer, and a second electrode layer. A via penetrates the first passivation layer and the second passivation layer to expose a portion of the first electrode layer, and the via has a sidewall. The second electrode layer is electrically connected to the first electrode layer through the via, the first passivation layer has a first edge on the sidewall of the via, the second passivation layer has a second edge on the sidewall of the via, and the first edge and the second edge are separated by a distance in the range of 500-2000 Å.

    Display device
    44.
    发明授权

    公开(公告)号:US09911762B2

    公开(公告)日:2018-03-06

    申请号:US15363289

    申请日:2016-11-29

    Abstract: A display device is provided, which includes a substrate structure containing a substrate with a pixel region, and the pixel region includes an aperture region. A metal oxide semiconductor transistor is disposed over the substrate and includes a metal oxide semiconductor layer with a first channel region, a first gate electrode corresponding to the first channel region, and a silicon oxide insulating layer on the metal oxide semiconductor layer. The silicon oxide insulating layer includes an opening corresponding to the aperture region. A polysilicon transistor is disposed over the substrate. The display device also includes an opposite substrate structure, and a display medium between the substrate structure and the opposite substrate structure.

    Thin film transistor substrate and display

    公开(公告)号:US09640563B2

    公开(公告)日:2017-05-02

    申请号:US14880472

    申请日:2015-10-12

    CPC classification number: H01L27/1248 H01L27/1225 H01L27/124

    Abstract: Disclosed is a TFT substrate, including a substrate and a gate electrode thereon. A gate insulation layer over the substrate covers the gate electrode. An active layer is disposed over the gate insulation layer. An etch stop layer is disposed over the active layer and the gate insulation layer. A first opening penetrates the etch stop layer to expose a first part of the active layer. A source electrode over the etch stop layer is electrically connected to the first part of the active layer through the first opening. A first inorganic insulation layer is disposed over the source electrode and the etch stop layer. A second opening penetrates the first inorganic insulation layer and the etch stop layer to expose a second part of the active layer.

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