利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

59 条记录 (耗时 0.028 秒)

    Magnetic tunnel junction structure having an oxidized buffer layer and method of fabricating the same
    41.
    发明授权
    Magnetic tunnel junction structure having an oxidized buffer layer and method of fabricating the same 有权
    具有氧化缓冲层的磁隧道结结构及其制造方法

    公开(公告)号：US07141438B2

    公开(公告)日：2006-11-28

    申请号：US10915872

    申请日：2004-08-10

    申请人： Young-Ki Ha ,  Jang-Eun Lee ,  Hyun-Jo Kim ,  Se-Chung Oh ,  Jun-Soo Bae ,  In-Gyu Baek

    发明人： Young-Ki Ha ,  Jang-Eun Lee ,  Hyun-Jo Kim ,  Se-Chung Oh ,  Jun-Soo Bae ,  In-Gyu Baek

    IPC分类号： H01L21/00

    CPC分类号： H01L43/12 ,  H01L43/08

    摘要： There are provided a magnetic tunnel junction structure and a method of fabricating the same. The magnetic tunnel junction structure includes a lower electrode, a lower magnetic layer pattern and a tunnel layer pattern, which are sequentially formed on the lower electrode. The magnetic tunnel junction structure further includes an upper magnetic layer pattern, a buffer layer pattern, and an upper electrode, which are sequentially formed on a portion of the tunnel layer pattern. The sidewall of the upper magnetic layer pattern is surrounded by an oxidized upper magnetic layer, and the sidewall of the buffer layer pattern is surrounded by an oxidized buffer layer. The depletion of the upper magnetic layer pattern and the lower magnetic layer pattern in the magnetic tunnel junction region can be prevented by the oxidized buffer layer.

    摘要翻译： 提供了一种磁性隧道结结构及其制造方法。 磁性隧道结结构包括依次形成在下电极上的下电极，下磁层图案和隧道层图案。 磁隧道结结构还包括依次形成在隧道层图案的一部分上的上磁层图案，缓冲层图案和上电极。 上部磁性层图案的侧壁由氧化的上部磁性层包围，缓冲层图案的侧壁由氧化的缓冲层包围。 可以通过氧化缓冲层来防止磁性隧道结区域中上部磁性层图案和下部磁性层图案的消耗。

    Magnetic random access memory devices including contact plugs between magnetic tunnel junction structures and substrates and related methods
    43.
    发明申请
    Magnetic random access memory devices including contact plugs between magnetic tunnel junction structures and substrates and related methods 审中-公开
    磁性随机存取存储器件包括磁性隧道结结构和衬底之间的接触插塞以及相关方法

    公开(公告)号：US20060027846A1

    公开(公告)日：2006-02-09

    申请号：US11145478

    申请日：2005-06-03

    申请人： Jang-Eun Lee ,  Se-Chung Oh ,  Jun-Soo Bae ,  Hyun-Jo Kim ,  Young-Ki Ha ,  Kyung-Tae Nam

    发明人： Jang-Eun Lee ,  Se-Chung Oh ,  Jun-Soo Bae ,  Hyun-Jo Kim ,  Young-Ki Ha ,  Kyung-Tae Nam

    IPC分类号： H01L29/94

    CPC分类号： H01L27/228 ,  B82Y10/00 ,  G11C11/161

    摘要： A magnetic random access memory device may include a semiconductor substrate, a magnetic tunnel junction (MTJ) structure, a contact plug, and a digit line. More particularly, the MTJ structure may be on the semiconductor substrate, and the digit line may be adjacent the magnetic tunnel junction structure. In addition, the contact plug may provide electrical connection between the magnetic tunnel junction structure and the semiconductor substrate, and the contact plug may be between the magnetic tunnel junction structure and the semiconductor substrate. Related methods are also discussed.

    摘要翻译： 磁性随机存取存储器件可以包括半导体衬底，磁性隧道结（MTJ）结构，接触插塞和数字线。 更具体地，MTJ结构可以在半导体衬底上，并且数字线可以与磁性隧道结结构相邻。 此外，接触插头可以在磁性隧道结结构和半导体衬底之间提供电连接，并且接触插塞可以在磁性隧道结结构和半导体衬底之间。 还讨论了相关方法。

    Magnetic memory device
    48.
    发明授权
    Magnetic memory device 有权
    磁存储器件

    公开(公告)号：US08035145B2

    公开(公告)日：2011-10-11

    申请号：US12773451

    申请日：2010-05-04

    申请人： Jun-Soo Bae ,  Jang-Eun Lee ,  Hyun-Jo Kim ,  Se-Chung Oh ,  Kyung-Tae Nam

    发明人： Jun-Soo Bae ,  Jang-Eun Lee ,  Hyun-Jo Kim ,  Se-Chung Oh ,  Kyung-Tae Nam

    IPC分类号： H01L21/02

    CPC分类号： G11C11/15 ,  B82Y25/00 ,  B82Y40/00 ,  H01F10/3254 ,  H01F10/3272 ,  H01F10/3281 ,  H01F41/302 ,  H01L43/08

    摘要： A magnetic memory device is provided. The magnetic memory device includes an invariable pinning pattern and a variable pinning pattern on a substrate. A tunnel barrier pattern is interposed between the invariable pinning pattern and the variable pinning pattern, and the pinned pattern is interposed between the invariable pinning pattern and the tunnel barrier pattern. A storage free pattern is interposed between the tunnel barrier pattern and the variable pinning pattern, and a guide free pattern is interposed between the storage free pattern and the variable pinning pattern. A free reversing pattern is interposed between the storage and guide free patterns. The free reversing pattern reverses a magnetization direction of the storage free pattern and a magnetization direction of the guide free pattern in the opposite directions.

    摘要翻译： 提供磁存储器件。 磁存储器件在衬底上包括不变的钉扎图案和可变的钉扎图案。 在不变的钉扎图案和可变钉扎图案之间插入隧道势垒图案，并且钉扎图案介于不变钉扎图案和隧道屏障图案之间。 在隧道势垒图案和可变钉扎图案之间插入无存储图案，并且在存储空闲图案和可变钉扎图案之间插入无引导图案。 在存储和无引导模式之间插入一个自由的反转模式。 自由反转图案反转无存储图案的磁化方向和反向自由图案的磁化方向。

    Resistance variable memory device and operating method thereof
    49.
    发明授权
    Resistance variable memory device and operating method thereof 有权
    电阻变量存储器件及其操作方法

    公开(公告)号：US07787278B2

    公开(公告)日：2010-08-31

    申请号：US12229341

    申请日：2008-08-22

    申请人： Jun-Soo Bae ,  Hideki Horii ,  Mi-Lim Park

    发明人： Jun-Soo Bae ,  Hideki Horii ,  Mi-Lim Park

    IPC分类号： G11C17/00

    CPC分类号： G11C11/56 ,  G11C11/5678 ,  G11C13/0004

    摘要： Provided is a resistance variable memory device and a method for operating same. The resistance variable memory device has a phase change material between a top electrode and a bottom electrode. In the method for operating a resistance variable memory, the write current is applied in a direction from the top electrode to the bottom electrode, and the read current is applied in a direction from the bottom electrode to the top electrode. The phase change material is programmed by applying the write current, and a resistance drift of the phase change material is restrained by applying the read current.

    摘要翻译： 提供一种电阻变量存储装置及其操作方法。 电阻可变存储器件在顶部电极和底部电极之间具有相变材料。 在用于操作电阻可变存储器的方法中，写入电流沿从顶部电极到底部电极的方向施加，并且读取电流沿着从底部电极到顶部电极的方向施加。 通过施加写入电流来编程相变材料，并且通过施加读取电流来抑制相变材料的电阻漂移。

    Resistance variable memory device and programming method thereof
    50.
    发明授权
    Resistance variable memory device and programming method thereof 有权
    电阻变量存储器件及其编程方法

    公开(公告)号：US07778066B2

    公开(公告)日：2010-08-17

    申请号：US12228914

    申请日：2008-08-18

    申请人： Hideki Horii ,  Jun-Soo Bae

    发明人： Hideki Horii ,  Jun-Soo Bae

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0069 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2013/0078 ,  G11C2013/0092

    摘要： Provided is a method of programming a resistance variable memory device. The resistance variable memory device includes a memory cell having multi states and a write driver outputting a program pulse for programming the memory cell into one of the multi states. The method of programming the resistance variable memory device includes applying a first program pulse to the resistance variable memory device and applying a second program pulse to a memory cell when the memory cell is programmed into an intermediate state. When the first program pulse is a reset pulse, the reset pulse is an over program pulse, that is, an over reset pulse. Therefore, the resistance variable memory device can secure a sufficient read margin as well as improve a resistance drift margin.

    摘要翻译： 提供了一种编程电阻变量存储器件的方法。 电阻可变存储器件包括具有多态的存储器单元和写入驱动器，其输出用于将存储器单元编程为多态的其中一个的编程脉冲。 编程电阻可变存储器件的方法包括：当存储器单元被编程到中间状态时，将第一编程脉冲施加到电阻可变存储器件并向存储单元施加第二编程脉冲。 当第一个编程脉冲是复位脉冲时，复位脉冲是过程编程脉冲，即过复位脉冲。 因此，电阻可变存储器件可以确保足够的读取余量以及改善电阻漂移裕度。