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129 条记录 (耗时 0.032 秒)

    Image processing apparatus, image processing method, storage medium storing a program readable by a computer and program
    42.
    发明申请
    Image processing apparatus, image processing method, storage medium storing a program readable by a computer and program 失效
    图像处理装置，图像处理方法，存储由计算机和程序读取的程序的存储介质

    公开(公告)号：US20050030585A1

    公开(公告)日：2005-02-10

    申请号：US10910541

    申请日：2004-08-04

    申请人： Tetsuya Suwa ,  Tomoyuki Watanabe ,  Hirokazu Ishii

    发明人： Tetsuya Suwa ,  Tomoyuki Watanabe ,  Hirokazu Ishii

    IPC分类号： G06T5/00 ,  G06F3/12 ,  G06T5/20 ,  H04N1/409 ,  H04N1/41 ,  H04N1/46 ,  H04N19/00 ,  H04N19/423 ,  H04N19/44 ,  H04N19/80 ,  H04N19/85 ,  G06F12/00 ,  G06F13/00 ,  H04N1/21 ,  H04N1/50

    CPC分类号： H04N1/46

    摘要： At the image processing time for an image data, a storage area to be secured is reduced, and moreover, the number of access processing times for the storage area which is required until the image processing result is obtained is sharply reduced, thereby shortening the processing time. Consequently, an image correction processing portion is characterized by a configuration wherein the image correction processing portion secures an image correction buffer to store the image data for at least M+(N−1) lines, and when it is determined that an image correction processing requires decoding processing, the address of an image correction buffer is set as a decoding destination, and the image correction processing for the image data is performed within the set storage area.

    摘要翻译： 在图像数据的图像处理时间，减少了要保护的存储区域，并且，直到获得图像处理结果所需的存储区域的访问处理次数急剧减少，从而缩短了处理 时间。 因此，图像校正处理部分的特征在于其中图像校正处理部分确保图像校正缓冲器以至少存储M +（N-1）行的图像数据，并且当确定图像校正处理需要 解码处理，将图像校正缓冲器的地址设置为解码目的地，并且在设置的存储区域内执行用于图像数据的图像校正处理。

    Exposure apparatus and field stop thereof
    43.
    发明授权
    Exposure apparatus and field stop thereof 有权
    曝光装置及其现场停止

    公开(公告)号：US06213607B1

    公开(公告)日：2001-04-10

    申请号：US09293953

    申请日：1999-04-19

    申请人： Tomoyuki Watanabe ,  Masamitsu Yanagihara ,  Hideji Goto ,  Noritsugu Hanazaki

    发明人： Tomoyuki Watanabe ,  Masamitsu Yanagihara ,  Hideji Goto ,  Noritsugu Hanazaki

    IPC分类号： G02B2700

    CPC分类号： G03F7/70066 ,  G03F7/70475

    摘要： An exposure apparatus has a field stop, disposed in a position conjugate to a reticle, for regulating an illumination area on the reticle. The field stop is constructed of two aperture members including light shielding portions, rectangular first and second apertures and light reducing portions formed at sides of these apertures. The exposure apparatus also has a drive system for shifting positions of light reducing portions and relatively moving the two aperture members during the projection.

    摘要翻译： 曝光装置具有设置在与掩模版共轭的位置的场停止件，用于调节掩模版上的照明区域。 场挡由两个光圈构件构成，包括遮光部分，矩形第一和第二孔以及形成在这些孔的侧面的减光部分。 曝光装置还具有用于在投影期间移动减光部分的位置并相对移动两个光圈构件的驱动系统。

    Semiconductor circuit
    46.
    发明授权
    Semiconductor circuit 失效
    半导体电路

    公开(公告)号：US4847550A

    公开(公告)日：1989-07-11

    申请号：US143802

    申请日：1988-01-14

    申请人： Satoshi Tanaka ,  Hirotoshi Tanaka ,  Taizo Kinoshita ,  Nobuo Kotera ,  Minoru Nagata ,  Kiichi Yamashita ,  Tomoyuki Watanabe

    发明人： Satoshi Tanaka ,  Hirotoshi Tanaka ,  Taizo Kinoshita ,  Nobuo Kotera ,  Minoru Nagata ,  Kiichi Yamashita ,  Tomoyuki Watanabe

    IPC分类号： G05F3/24

    CPC分类号： G05F3/245 ,  G05F3/247

    摘要： A constant voltage circuit according to this invention comprises first means attenuating or dividing fluctuating voltage and an amplifying FET, to the gate of which the output attenuated or divided by the first means is applied and whose drain is connected with the fluctuating voltage through load means. The attenuation ratio or division ratio of the first means, the mutual conductance of the amplifying FET and the impedance of the load means are so set that the voltage drop across the load means cancels the fluctuating amount of the fluctuating voltage. Consequently an output voltage, which is maintained substantially constant, is obtained at the drain of the amplifying FET, independently of fluctuations in the fluctuating voltage, and thus a constant voltage circuit can be obtained. A constant current circuit according to this invention utilizes the constant voltage circuit described above. The output voltage of the constant voltage circuit is supplied to the gate of the constant current FET. Consequently a current, which is maintained substantially constant, flows through the drain-source path of this constant current FET and thus a constant current circuit can be obtained.