公开(公告)号：US08658508B2

公开(公告)日：2014-02-25

申请号：US13411864

申请日：2012-03-05

申请人： Takeshi Shichi ,  Junichi Koezuka ,  Hideto Ohnuma ,  Shunpei Yamazaki

发明人： Takeshi Shichi ,  Junichi Koezuka ,  Hideto Ohnuma ,  Shunpei Yamazaki

IPC分类号： H01L21/33 ,  H01L21/8222

CPC分类号： H01L27/1266 ,  H01L21/76254 ,  H01L27/1214 ,  H01L29/66772

摘要： The present invention provides a method for manufacturing an SOI substrate, to improve planarity of a surface of a single crystal semiconductor layer after separation by favorably separating a single crystal semiconductor substrate even in the case where a non-mass-separation type ion irradiation method is used, and to improve planarity of a surface of a single crystal semiconductor layer after separation as well as to improve throughput. The method includes the steps of irradiating a single crystal semiconductor substrate with accelerated ions by an ion doping method while the single crystal semiconductor substrate is cooled to form an embrittled region in the single crystal semiconductor substrate; bonding the single crystal semiconductor substrate and a base substrate with an insulating layer interposed therebetween; and separating the single crystal semiconductor substrate along the embrittled region to form a single crystal semiconductor layer over the base substrate with the insulating layer interposed therebetween.

摘要翻译： 本发明提供一种制造SOI衬底的方法，即使在非质量分离型离子照射方法为非质子分离型离子照射方法的情况下，通过有利地分离单晶半导体衬底来提高分离后的单晶半导体层的表面的平面性 并且在分离之后提高单晶半导体层的表面的平面性以及提高生产量。 该方法包括以下步骤：当单晶半导体衬底被冷却以在单晶半导体衬底中形成脆化区域时，通过离子掺杂方法照射具有加速离子的单晶半导体衬底; 将单晶半导体衬底和基底衬底之间插入绝缘层; 并且沿着脆化区域分离单晶半导体衬底，以在基底衬底上形成绝缘层，形成单晶半导体层。

公开(公告)号：US08643008B2

公开(公告)日：2014-02-04

申请号：US13547119

申请日：2012-07-12

申请人： Shunpei Yamazaki ,  Naoto Yamade ,  Junichi Koezuka

发明人： Shunpei Yamazaki ,  Naoto Yamade ,  Junichi Koezuka

IPC分类号： H01L29/10 ,  H01L29/18 ,  H01L27/148

CPC分类号： H01L27/1225

摘要： A semiconductor device which can operate at high speed and consumes a smaller amount of power is provided. In a semiconductor device including transistors each including an oxide semiconductor, the oxygen concentration of the oxide semiconductor film of the transistor having small current at negative gate voltage is different from that of the oxide semiconductor film of the transistor having high field-effect mobility and large on-state current. Typically, the oxygen concentration of the oxide semiconductor film of the transistor having high field-effect mobility and large on-state current is lower than that of the oxide semiconductor film of the transistor having small current at negative gate voltage.

摘要翻译： 提供了可以高速运行并消耗更少功率的半导体器件。 在包括各自包含氧化物半导体的晶体管的半导体器件中，在负栅极电压下具有小电流的晶体管的氧化物半导体膜的氧浓度与具有高场效应迁移率的晶体管的氧化物半导体膜的氧浓度不同 通态电流。 通常，具有高场电迁移率和大导通状态电流的晶体管的氧化物半导体膜的氧浓度低于在负栅极电压下具有小电流的晶体管的氧化物半导体膜的氧浓度。

公开(公告)号：US20120190171A1

公开(公告)日：2012-07-26

申请号：US13346754

申请日：2012-01-10

申请人： Shunpei Yamazaki ,  Junichi Koezuka ,  Kazuya Hanaoka

发明人： Shunpei Yamazaki ,  Junichi Koezuka ,  Kazuya Hanaoka

IPC分类号： H01L21/30

CPC分类号： H01L21/76254

摘要： An SOI substrate is manufactured by the following steps: a semiconductor substrate is irradiated with an ion beam in which the proportion of H2O+ to hydrogen ions (H3+) is lower than or equal to 3%, preferably lower than or equal to 0.3%, whereby an embrittled region is formed in the semiconductor substrate; a surface of the semiconductor substrate and a surface of a base substrate are disposed so as to be in contact with each other, whereby the semiconductor substrate and the base substrate are bonded; and a semiconductor layer is separated along the embrittled region from the semiconductor substrate which is bonded to the base substrate by heating the semiconductor substrate and the base substrate, so that the semiconductor layer is formed over the base substrate.

摘要翻译： 通过以下步骤制造SOI衬底：用H 2 O +与氢离子（H3 +）的比例低于或等于3％，优选低于或等于0.3％的离子束照射半导体衬底，由此 在半导体衬底中形成脆化区域; 将半导体基板的表面和基板的表面配置成彼此接触，由此结合半导体基板和基板; 并且通过加热半导体衬底和基底衬底而将半导体层沿着与半导体衬底分离的结合到基底衬底上，使得半导体层形成在基底衬底上。

公开(公告)号：US07605029B2

公开(公告)日：2009-10-20

申请号：US11410274

申请日：2006-04-25

申请人： Osamu Nakamura ,  Shunpei Yamazaki ,  Koji Dairiki ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Satoshi Murakami

发明人： Osamu Nakamura ,  Shunpei Yamazaki ,  Koji Dairiki ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Satoshi Murakami

IPC分类号： H01L21/00

CPC分类号： H01L27/12 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02675 ,  H01L21/3226 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78624 ,  H01L29/78633 ,  H01L29/78645 ,  H01L29/78675

摘要： According to the present invention, an impurity region, to which a rare gas element (also called a rare gas) and one kind or a plurality of kinds of elements selected from the group consisting of H, H2, O, O2, and P are added, are formed in a semiconductor film having a crystalline structure, using a mask, and gettering for segregating a metal element contained in the semiconductor film to the impurity region by heat treatment. Thereafter, pattering is conducted using the mask, whereby a semiconductor layer made of the semiconductor film having a crystalline structure is formed.

公开(公告)号：US20070298555A1

公开(公告)日：2007-12-27

申请号：US11882907

申请日：2007-08-07

申请人： Shunpei Yamazaki ,  Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Koji Dairiki ,  Toru Mitsuki ,  Toru Takayama ,  Hideto Ohnuma ,  Taketomi Asami ,  Mitsuhiro Ichijo

发明人： Shunpei Yamazaki ,  Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Koji Dairiki ,  Toru Mitsuki ,  Toru Takayama ,  Hideto Ohnuma ,  Taketomi Asami ,  Mitsuhiro Ichijo

IPC分类号： H01L21/84

CPC分类号： H01L29/66757 ,  G02F1/13454 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/78621 ,  H01L29/78624 ,  H01L29/78675 ,  H01L29/78678

摘要： An object is to reduce the number of high temperature (equal to or greater than 600° C.) heat treatment process steps and achieve lower temperature (equal to or less than 600° C.) processes, and to simplify the process steps and increase throughput in a method of manufacturing a semiconductor device. With the present invention, a barrier layer, a second semiconductor film, and a third semiconductor film containing an inert gas element are formed on a first semiconductor film having a crystalline structure. Gettering is performed and a metallic element contained in the first semiconductor film passes through the barrier layer and the second semiconductor film by a heat treatment process, and moves to the third semiconductor film. The second semiconductor film and the third semiconductor film are then removed, with the barrier layer used as an etching stopper.

摘要翻译： 目的是减少高温（等于或高于600℃）的热处理工艺步骤，达到较低的温度（等于或小于600℃）的工艺，并简化工艺步骤并增加 在制造半导体器件的方法中的吞吐量。 利用本发明，在具有晶体结构的第一半导体膜上形成阻挡层，第二半导体膜和含有惰性气体元件的第三半导体膜。 进行吸气，并且包含在第一半导体膜中的金属元素通过热处理工艺通过阻挡层和第二半导体膜，并移动到第三半导体膜。 然后去除第二半导体膜和第三半导体膜，其中阻挡层用作蚀刻停止层。

公开(公告)号：US07198992B2

公开(公告)日：2007-04-03

申请号：US10867515

申请日：2004-06-14

申请人： Takashi Hamada ,  Satoshi Murakami ,  Shunpei Yamazaki ,  Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Toru Takayama

发明人： Takashi Hamada ,  Satoshi Murakami ,  Shunpei Yamazaki ,  Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Toru Takayama

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： H01L21/02672 ,  G02F1/13454 ,  H01L21/2022 ,  H01L21/3226 ,  H01L27/12 ,  H01L27/1248 ,  H01L27/1277 ,  H01L27/1288 ,  H01L27/3246 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78621 ,  H01L51/5253 ,  H01L51/56

摘要： The present invention is characterized in that a semiconductor film containing a rare gas element is formed on a crystalline semiconductor film obtained by using a catalytic element via a barrier layer, and the catalytic element is moved from the crystalline semiconductor film to the semiconductor film containing a rare gas element by a heat treatment. Furthermore, a first impurity region and a second impurity region formed in a semiconductor layer of a first n-channel TFT are provided outside a gate electrode. A third impurity region formed in a semiconductor layer of a second n-channel TFT is provided so as to be partially overlapped with a gate electrode. A third impurity region is provided outside a gate electrode. A fourth impurity region formed in a semiconductor layer of a p-channel TFT is provided so as to be partially overlapped with a gate electrode. A fifth impurity region is provided outside a gate electrode.

摘要翻译： 本发明的特征在于，在通过阻挡层使用催化元件而获得的结晶半导体膜上形成含有稀有气体元素的半导体膜，催化元素从结晶半导体膜移动到含有 稀有气体元素通过热处理。 此外，形成在第一n沟道TFT的半导体层中的第一杂质区域和第二杂质区域设置在栅电极的外侧。 形成在第二n沟道TFT的半导体层中的第三杂质区域设置成与栅电极部分重叠。 第三杂质区域设置在栅极外部。 形成在p沟道TFT的半导体层中的第四杂质区域设置成与栅电极部分重叠。 第五杂质区域设置在栅极外部。

公开(公告)号：US20060270128A1

公开(公告)日：2006-11-30

申请号：US11410274

申请日：2006-04-25

申请人： Osamu Nakamura ,  Shunpei Yamazaki ,  Koji Dairiki ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Satoshi Murakami

发明人： Osamu Nakamura ,  Shunpei Yamazaki ,  Koji Dairiki ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Satoshi Murakami

IPC分类号： H01L21/84 ,  H01L21/322 ,  H01L21/20

CPC分类号： H01L27/12 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02675 ,  H01L21/3226 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78624 ,  H01L29/78633 ,  H01L29/78645 ,  H01L29/78675

摘要： According to the present invention, an impurity region, to which a rare gas element (also called a rare gas) and one kind or a plurality of kinds of elements selected from the group consisting of H, H2, O, O2, and P are added, are formed in a semiconductor film having a crystalline structure, using a mask, and gettering for segregating a metal element contained in the semiconductor film to the impurity region by heat treatment. Thereafter, pattering is conducted using the mask, whereby a semiconductor layer made of the semiconductor film having a crystalline structure is formed.

公开(公告)号：US20060255370A1

公开(公告)日：2006-11-16

申请号：US11404923

申请日：2006-04-17

申请人： Shunpei Yamazaki ,  Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka

发明人： Shunpei Yamazaki ,  Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka

IPC分类号： H01L27/148 ,  H01L21/322

CPC分类号： H01L29/78621 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/02672 ,  H01L21/02675 ,  H01L27/1255 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78633 ,  H01L29/78645 ,  Y10S257/913

摘要： Phosphorus is implanted into a crystalline semiconductor film by an ion dope method. However, a concentration of phosphorus required for gettering is 1×1020/cm3 or higher which hinders recrystallization by later anneal, and thus this becomes a problem. Also, when phosphorus is added at a high concentration, processing time required for doping is increased and throughput in a doping step is reduced, and thus this becomes a problem. The present invention is characterized in that impurity regions to which an element belonging to the group 18 of the periodic table is added are formed in a semiconductor film having a crystalline structure and gettering for segregating in the impurity regions a metal element contained in the semiconductor film is performed by heat treatment. Also, a one conductivity type impurity may be contained in the impurity regions.

摘要翻译： 通过离子掺杂法将磷注入到结晶半导体膜中。 然而，吸杂所需的磷的浓度为1×10 20 / cm 3以上，这阻碍了后续退火的再结晶，因此成为问题。 此外，当以高浓度添加磷时，掺杂所需的处理时间增加，并且掺杂步骤中的生产量降低，因此这成为问题。 本发明的特征在于，在具有晶体结构的半导体膜中形成杂质区域，其中添加了属于元素周期表第18族的元素，并且在杂质区域中分离出包含在半导体膜中的金属元素的吸杂剂 通过热处理进行。 此外，杂质区域中也可以含有一种导电型杂质。

公开(公告)号：US06858480B2

公开(公告)日：2005-02-22

申请号：US10046893

申请日：2002-01-17

申请人： Osamu Nakamura ,  Shunpei Yamazaki ,  Koji Dairiki ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Satoshi Murakami

发明人： Osamu Nakamura ,  Shunpei Yamazaki ,  Koji Dairiki ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Satoshi Murakami

IPC分类号： H01L21/20 ,  H01L21/322 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786 ,  H01L21/00

CPC分类号： H01L27/12 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02675 ,  H01L21/3226 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78624 ,  H01L29/78633 ,  H01L29/78645 ,  H01L29/78675

摘要： According to the present invention, an impurity region, to which a rare gas element (also called a rare gas) and one kind or a plurality of kinds of elements selected from the group consisting of H, H2, O, O2, and P are added, are formed in a semiconductor film having a crystalline structure, using a mask, and gettering for segregating a metal element contained in the semiconductor film to the impurity region by heat treatment. Thereafter, pattering is conducted using the mask, whereby a semiconductor layer made of the semiconductor film having a crystalline structure is formed.

摘要翻译： 根据本发明，稀有气体元素（也称为稀有气体）和选自H，H 2，O，O 2和P中的一种或多种元素的杂质区域是 使用掩模形成具有晶体结构的半导体膜，并且通过热处理将用于将包含在半导体膜中的金属元素分离到杂质区域的吸杂剂形成。 此后，使用掩模进行图案化，由此形成由具有晶体结构的半导体膜制成的半导体层。

公开(公告)号：US20050032336A1

公开(公告)日：2005-02-10

申请号：US10940821

申请日：2004-09-15

申请人： Shunpei Yamazaki ,  Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Koji Dairiki ,  Toru Mitsuki ,  Toru Takayama ,  Hideto Ohnuma ,  Taketomi Asami ,  Mitsuhiro Ichijo

发明人： Shunpei Yamazaki ,  Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Koji Dairiki ,  Toru Mitsuki ,  Toru Takayama ,  Hideto Ohnuma ,  Taketomi Asami ,  Mitsuhiro Ichijo

IPC分类号： G02F1/1368 ,  H01L21/20 ,  H01L21/28 ,  H01L21/322 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786 ,  H01L21/00

CPC分类号： H01L21/02672 ,  H01L21/02532 ,  H01L21/2022 ,  H01L21/3221 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78633 ,  H01L29/78645 ,  H01L29/78675 ,  H01L29/78678

摘要： It is intended to achieve the reduction in number of heat treatments carried out at high temperature (at least 600° C.) and the employment of lower temperature processes (600° C. or lower), and to achieve step simplification and throughput improvement. In the present invention, a barrier layer (105), a second semiconductor film (106), and a third semiconductor layer (108) containing an impurity element (phosphorus) that imparts one conductive type are formed on a first semiconductor film (104) having a crystalline structure. Gettering is carried out in which the metal element contained in the first semiconductor film (104) is allowed to pass through the barrier layer (105) and the second semiconductor film (106) by a heat treatment to move into the third semiconductor film (107). Afterward, the second and third semiconductor films (106) and (107) are removed with the barrier layer (105) used as an etching stopper.

摘要翻译： 旨在实现在高温（至少600℃）下进行的热处理和使用较低温度工艺（600℃或更低）的热处理数量的减少，并且实现步骤简化和生产量提高。 在本发明中，在第一半导体膜（104）上形成有阻挡层（105），第二半导体膜（106）和含有赋予一种导电类型的杂质元素（磷）的第三半导体层（108） 具有晶体结构。 进行吸收，其中包含在第一半导体膜（104）中的金属元素被允许通过热处理通过阻挡层（105）和第二半导体膜（106）以移动到第三半导体膜（107） ）。 之后，第二和第三半导体膜（106）和（107）被用作蚀刻停止层的阻挡层（105）去除。