公开(公告)号：US11728292B2

公开(公告)日：2023-08-15

申请号：US16779217

申请日：2020-01-31

Applicant: MediaTek Inc.

Inventor： Tzu-Hung Lin ,  I-Hsuan Peng ,  Nai-Wei Liu ,  Wei-Che Huang ,  Che-Ya Chou

IPC: H01L23/552 ,  H01L23/66 ,  H01L23/538 ,  H01L25/16 ,  H01L23/00 ,  H01L25/10 ,  H01L23/498

CPC classification number: H01L23/66 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/19 ,  H01L24/20 ,  H01L25/16 ,  H01L23/49816 ,  H01L25/105 ,  H01L2223/6677 ,  H01L2224/02379 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/1421 ,  H01L2924/1435 ,  H01L2924/1438 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3025

Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first semiconductor package including a first redistribution layer (RDL) structure having a first surface and a second surface opposite to the first substrate. The first RDL structure includes a plurality of first conductive traces close to the first surface of the first RDL structure. An antenna pattern is disposed close to the second surface of the first RDL structure. A first semiconductor die is disposed on the first surface of the first RDL structure and electrically coupled to the first RDL structure. A plurality of conductive structures is disposed on the first surface of the first RDL structure and electrically coupled to the first RDL structure. The plurality of conductive structures is spaced apart from the antenna pattern through the plurality of first conductive traces of the first RDL structure.

公开(公告)号：US11410936B2

公开(公告)日：2022-08-09

申请号：US16983182

申请日：2020-08-03

Applicant: MEDIATEK INC.

Inventor： Tzu-Hung Lin ,  Chia-Cheng Chang ,  I-Hsuan Peng ,  Nai-Wei Liu

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L25/065 ,  H01L23/043 ,  H01L23/13 ,  H01L23/538

Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a substrate having a first surface and a second surface opposite thereto, wherein the substrate includes a wiring structure, and a first semiconductor die disposed over the first surface of the substrate and electrically coupled to the wiring structure. The package further includes a second semiconductor die disposed over the first surface of the substrate and electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are separated by a molding material. A first hole and a second hole are formed on the second surface of the substrate. Finally, a frame is disposed over the first surface of the substrate, wherein the frame surrounds the first semiconductor die and the second semiconductor die.

公开(公告)号：US20210327835A1

公开(公告)日：2021-10-21

申请号：US17361285

申请日：2021-06-28

Applicant: MediaTek Inc.

Inventor： Nai-Wei Liu ,  Yen-Yao Chi ,  Yeh-Chun Kao ,  Shih-Huang Yeh ,  Tzu-Hung Lin ,  Wen-Sung Hsu

IPC: H01L23/66 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01Q1/22 ,  H01Q9/04 ,  H01Q9/16

Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a first redistribution layer (RDL) structure formed on a non-active surface of a semiconductor die. A second RDL structure is formed on and electrically coupled to an active surface of the semiconductor die. A ground layer is formed in the first RDL structure. A first molding compound layer is formed on the first RDL structure. A first antenna includes a first antenna element formed in the second RDL structure and a second antenna element formed on the first molding compound layer. Each of the first antenna element and the second antenna element has a first portion overlapping the semiconductor die as viewed from a top-view perspective.

公开(公告)号：US11081453B2

公开(公告)日：2021-08-03

申请号：US16452395

申请日：2019-06-25

Applicant: MediaTek Inc.

Inventor： Nai-Wei Liu ,  Yen-Yao Chi ,  Yeh-Chun Kao ,  Shih-Huang Yeh ,  Tzu-Hung Lin ,  Wen-Sung Hsu

IPC: H01L23/66 ,  H01Q1/22 ,  H01Q9/04 ,  H01Q9/16 ,  H01L23/31 ,  H01L23/498 ,  H01L23/48

Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a first redistribution layer (RDL) structure formed on a non-active surface of a semiconductor die. A second RDL structure is formed on and electrically coupled to an active surface of the semiconductor die. A ground layer is formed in the first RDL structure. A first molding compound layer is formed on the first RDL structure. A first antenna includes a first antenna element formed in the second RDL structure and a second antenna element formed on the first molding compound layer. Each of the first antenna element and the second antenna element has a first portion overlapping the semiconductor die as viewed from a top-view perspective.

公开(公告)号：US20200176408A1

公开(公告)日：2020-06-04

申请号：US16721475

申请日：2019-12-19

Applicant: MediaTek Inc.

Inventor： Tzu-Hung Lin ,  Wen-Sung Hsu ,  Ta-Jen Yu ,  Andrew C. Chang

IPC: H01L23/00 ,  H01L23/495 ,  H05K1/11 ,  H01L21/48 ,  H01L23/498 ,  H01L49/02

Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a conductive trace embedded in a base. A semiconductor device is mounted on the conductive trace via a conductive structure.

公开(公告)号：US10580747B2

公开(公告)日：2020-03-03

申请号：US14205880

申请日：2014-03-12

Applicant: MediaTek Inc.

Inventor： Tzu-Hung Lin ,  Wen-Sung Hsu ,  Ta-Jen Yu ,  Andrew C. Chang

IPC: H01L23/00 ,  H01L49/02 ,  H01L23/498 ,  H01L21/48 ,  H05K1/11 ,  H01L23/495 ,  H05K3/34

Abstract: In one configuration, a semiconductor package includes a conductive trace embedded in a base and a semiconductor device mounted on the conductive trace via a conductive structure, wherein the conductive structure is a bump structure and the width of the bump structure is bigger than the width of the conductive trace. In another configuration, a method for fabricating a semiconductor package includes providing a base, forming at least one conductive trace on the base, forming an additional insulation material on the base, and defining patterns upon the additional insulation material, wherein the pattern is formed on at least one conductive trace, wherein the conductive structure is a bump structure and the width of the bump structure is bigger than the width of the conductive trace.

公开(公告)号：US10553526B2

公开(公告)日：2020-02-04

申请号：US15460583

申请日：2017-03-16

Applicant: MEDIATEK, INC.

Inventor： Wen-Sung Hsu ,  Tzu-Hung Lin ,  Ta-Jen Yu

IPC: H01L23/498 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor package is provided. In one configuration, the semiconductor package includes a substrate having a die attach surface. A conductive trace is disposed on the substrate, wherein the conductive trace is elongated and carries a signal or a ground across at least a portion of the substrate. A die is mounted on the die attach surface of the substrate via a conductive pillar bump, the conductive pillar bump being rounded and elongated such that the conductive pillar bump extends along a length of the conductive trace and contacts the conductive trace at an end or at an intermediate portion thereof. The die further includes a metal pad electrically coupling to the conductive pillar bump, wherein the metal pad has a first edge and a second edge substantially vertical to the first edge, and wherein the first edge is not adjacent to the second edge.

公开(公告)号：US10468341B2

公开(公告)日：2019-11-05

申请号：US16232129

申请日：2018-12-26

Applicant: MEDIATEK INC.

Inventor： Nai-Wei Liu ,  Tzu-Hung Lin ,  I-Hsuan Peng ,  Che-Hung Kuo ,  Che-Ya Chou ,  Wei-Che Huang

IPC: H01L23/485 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L23/538 ,  H01L25/10

Abstract: A semiconductor package assembly includes a redistribution layer (RDL) structure, which RDL structure includes a conductive trace. A redistribution layer (RDL) contact pad is electrically coupled to the conductive trace, and the RDL contact pad is composed of a symmetrical portion and an extended wing portion connected to the symmetrical portion. The RDL structure includes a first region for a semiconductor die to be disposed thereon and a second region surrounding the first region, and the extended wing portion of the RDL contact pad is offset from a center of the first region.

公开(公告)号：US20190252351A1

公开(公告)日：2019-08-15

申请号：US16279925

申请日：2019-02-19

Applicant: MediaTek Inc.

Inventor： Tzu-Hung Lin ,  I-Hsuan Peng ,  Nai-Wei Liu ,  Ching-Wen Hsiao ,  Wei-Che Huang

IPC: H01L25/065 ,  H01L23/66 ,  H01L23/00 ,  H01L25/16 ,  H01L23/552 ,  H01L23/31 ,  H01L23/538 ,  H01L23/522

CPC classification number: H01L25/0652 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/5226 ,  H01L23/5385 ,  H01L23/5389 ,  H01L23/552 ,  H01L23/66 ,  H01L24/19 ,  H01L24/20 ,  H01L25/16 ,  H01L2223/6677 ,  H01L2224/02331 ,  H01L2224/02379 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/1207 ,  H01L2924/1421 ,  H01L2924/1435 ,  H01L2924/1438 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3025

Abstract: A semiconductor package structure including a first semiconductor package is provided. The first semiconductor package includes a first semiconductor package including a first redistribution layer (RDL) structure having a first surface and a second surface opposite thereto. A first semiconductor die and a first molding compound that surrounds the first semiconductor die are disposed on the first surface of the first RDL structure. An IMD structure having a conductive layer with an antenna pattern or a conductive shielding layer is disposed on the first molding compound and the first semiconductor die.

公开(公告)号：US10256210B2

公开(公告)日：2019-04-09

申请号：US15696247

申请日：2017-09-06

Applicant: MediaTek Inc.

Inventor： Tzu-Hung Lin ,  Ching-Wen Hsiao ,  I-Hsuan Peng

IPC: H01L25/065 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/498 ,  H01L25/16 ,  H01L25/00 ,  H01L23/00 ,  H01L21/60

Abstract: A semiconductor package structure has a first electronic component on an insulating layer, a dielectric layer on the insulating layer and surrounding the first electronic component, a second electronic component stacked on the first electronic component, wherein an active surface of the first electronic component faces an active surface of the second electronic component, a molding compound on the first electronic component and surrounding the second electronic component, a third electronic component stacked on the second electronic component and the molding compound.